Tom Rini | 53633a8 | 2024-02-29 12:33:36 -0500 | [diff] [blame] | 1 | # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) |
| 2 | %YAML 1.2 |
| 3 | --- |
| 4 | $id: http://devicetree.org/schemas/hwmon/amd,sbtsi.yaml# |
| 5 | $schema: http://devicetree.org/meta-schemas/core.yaml# |
| 6 | |
| 7 | title: > |
| 8 | Sideband interface Temperature Sensor Interface (SB-TSI) compliant |
| 9 | AMD SoC temperature device |
| 10 | |
| 11 | maintainers: |
| 12 | - Kun Yi <kunyi@google.com> |
| 13 | - Supreeth Venkatesh <supreeth.venkatesh@amd.com> |
| 14 | |
| 15 | description: | |
| 16 | SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible |
| 17 | interface that reports AMD SoC's Ttcl (normalized temperature), |
| 18 | and resembles a typical 8-pin remote temperature sensor's I2C interface |
| 19 | to BMC. The emulated thermal sensor can report temperatures in increments |
| 20 | of 0.125 degrees, ranging from 0 to 255.875. |
| 21 | |
| 22 | properties: |
| 23 | compatible: |
| 24 | enum: |
| 25 | - amd,sbtsi |
| 26 | |
| 27 | reg: |
| 28 | maxItems: 1 |
| 29 | description: | |
| 30 | I2C bus address of the device as specified in Section 6.3.1 of the |
| 31 | SoC register reference. The SB-TSI address is normally 98h for socket |
| 32 | 0 and 90h for socket 1, but it could vary based on hardware address |
| 33 | select pins. |
| 34 | \[open source SoC register reference\] |
| 35 | https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf |
| 36 | |
| 37 | required: |
| 38 | - compatible |
| 39 | - reg |
| 40 | |
| 41 | additionalProperties: false |
| 42 | |
| 43 | examples: |
| 44 | - | |
| 45 | i2c { |
| 46 | #address-cells = <1>; |
| 47 | #size-cells = <0>; |
| 48 | |
| 49 | sbtsi@4c { |
| 50 | compatible = "amd,sbtsi"; |
| 51 | reg = <0x4c>; |
| 52 | }; |
| 53 | }; |
| 54 | ... |