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Akshay Saraswatfdd9df32014-06-18 17:53:58 +05301/*
2 * Copyright (C) 2013 Samsung Electronics
3 *
4 * Configuration settings for the SAMSUNG EXYNOS5420 SoC
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __CONFIG_EXYNOS5420_H
10#define __CONFIG_EXYNOS5420_H
11
Simon Glass252747a2014-10-07 22:01:46 -060012#define CONFIG_EXYNOS5420
13
Simon Glass50dfd2c2014-10-07 22:01:48 -060014#define CONFIG_ENV_IS_IN_SPI_FLASH
15#define CONFIG_SPI_FLASH
16#define CONFIG_ENV_SPI_BASE 0x12D30000
17#define FLASH_SIZE (0x4 << 20)
18#define CONFIG_ENV_OFFSET (FLASH_SIZE - CONFIG_BL2_SIZE)
19#define CONFIG_SPI_BOOTING
20
Simon Glass252747a2014-10-07 22:01:46 -060021#include <configs/exynos5-common.h>
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053022
Simon Glass50dfd2c2014-10-07 22:01:48 -060023#define CONFIG_ARCH_EARLY_INIT_R
24
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053025#define MACH_TYPE_SMDK5420 8002
26#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
27
28#define CONFIG_VAR_SIZE_SPL
29
30#define CONFIG_SYS_SDRAM_BASE 0x20000000
31#define CONFIG_SYS_TEXT_BASE 0x23E00000
32#ifdef CONFIG_VAR_SIZE_SPL
33#define CONFIG_SPL_TEXT_BASE 0x02024410
34#else
35#define CONFIG_SPL_TEXT_BASE 0x02024400
36#endif
37#define CONFIG_IRAM_TOP 0x02074000
38
Akshay Saraswate2728422014-06-18 17:54:00 +053039#define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024)
40
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053041#define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420"
42
43#define CONFIG_MAX_I2C_NUM 11
44
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053045#define CONFIG_BOARD_REV_GPIO_COUNT 2
46
47#define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000"
48
Simon Glass50dfd2c2014-10-07 22:01:48 -060049#define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
50
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053051/*
52 * Put the initial stack pointer 1KB below this to allow room for the
53 * SPL marker. This value is arbitrary, but gd_t is placed starting here.
54 */
55#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
56
Michael Prattf2607922014-06-18 17:54:02 +053057/* DRAM Memory Banks */
58#define CONFIG_NR_DRAM_BANKS 7
59#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
60
Simon Glass50dfd2c2014-10-07 22:01:48 -060061/* Miscellaneous configurable options */
62#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
63
Akshay Saraswatfdd9df32014-06-18 17:53:58 +053064#endif /* __CONFIG_EXYNOS5420_H */