blob: 90d2e61147ba2b169abed8713777f04981a67146 [file] [log] [blame]
Heiko Schocher8a410f82010-04-01 12:10:30 +02001/*
2 * Copyright (C) 2006 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
4 *
5 * Copyright (C) 2007 Logic Product Development, Inc.
6 * Peter Barada <peterb@logicpd.com>
7 *
8 * Copyright (C) 2007 MontaVista Software, Inc.
9 * Anton Vorontsov <avorontsov@ru.mvista.com>
10 *
11 * (C) Copyright 2008
12 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
13 *
Holger Brunck50c57952012-03-21 13:42:42 +010014 * (C) Copyright 2010-2012
Heiko Schocher8a410f82010-04-01 12:10:30 +020015 * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
Holger Brunck4a630a72011-12-14 16:21:44 +010016 * Holger Brunck, Keymile GmbH, holger.bruncl@keymile.com
Heiko Schocher8a410f82010-04-01 12:10:30 +020017 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 */
23
24#ifndef __CONFIG_H
25#define __CONFIG_H
26
27/*
28 * High Level Configuration Options
29 */
Holger Brunck50c57952012-03-21 13:42:42 +010030#ifdef CONFIG_KMSUPX5
31#define CONFIG_KM_BOARD_NAME "kmsupx5"
32#define CONFIG_HOSTNAME kmsupx5
33#elif defined CONFIG_TUGE1
34#define CONFIG_KM_BOARD_NAME "tuge1"
35#define CONFIG_HOSTNAME tuge1
36#else
Holger Brunck2a1c5bd2011-12-14 16:21:45 +010037#define CONFIG_TUXXX /* TUXX1 board (tuxa1/tuda1) specific */
Holger Brunck50c57952012-03-21 13:42:42 +010038#define CONFIG_KM_BOARD_NAME "tuxx1"
Holger Brunck4a630a72011-12-14 16:21:44 +010039#define CONFIG_HOSTNAME tuxx1
Holger Brunck2a1c5bd2011-12-14 16:21:45 +010040#endif
Heiko Schocher8a410f82010-04-01 12:10:30 +020041
42#define CONFIG_SYS_TEXT_BASE 0xF0000000
Heiko Schocher8a410f82010-04-01 12:10:30 +020043
Heiko Schocher3a8dd212011-03-08 10:47:39 +010044/* include common defines/options for all 8321 Keymile boards */
Valentin Longchamp2f968d82011-05-04 01:47:33 +000045#include "km/km8321-common.h"
Heiko Schocher8a410f82010-04-01 12:10:30 +020046
Heiko Schocher8a410f82010-04-01 12:10:30 +020047#define CONFIG_SYS_APP1_BASE 0xA0000000 /* PAXG */
48#define CONFIG_SYS_APP1_SIZE 256 /* Megabytes */
Holger Brunck2a1c5bd2011-12-14 16:21:45 +010049#ifndef CONFIG_KM_DISABLE_APP2
Heiko Schocher8a410f82010-04-01 12:10:30 +020050#define CONFIG_SYS_APP2_BASE 0xB0000000 /* PINC3 */
51#define CONFIG_SYS_APP2_SIZE 256 /* Megabytes */
Holger Brunck2a1c5bd2011-12-14 16:21:45 +010052#endif
Heiko Schocher8a410f82010-04-01 12:10:30 +020053
Heiko Schocher8a410f82010-04-01 12:10:30 +020054/*
Heiko Schocher8a410f82010-04-01 12:10:30 +020055 * Init Local Bus Memory Controller:
56 *
Holger Brunck50c57952012-03-21 13:42:42 +010057 * Bank Bus Machine PortSz Size Device on TUDA1 TUXA1 TUGE1 KMSUPX4
58 * ---- --- ------- ------ ----- ---------------------------------------
59 * 2 Local GPCM 8 bit 256MB PAXG LPXF PAXI LPXF
60 * 3 Local GPCM 8 bit 256MB PINC3 PINC2 unused unused
Heiko Schocher8a410f82010-04-01 12:10:30 +020061 *
62 */
63
64/*
Holger Brunck4a630a72011-12-14 16:21:44 +010065 * Configuration for C2 on the local bus
Heiko Schocher8a410f82010-04-01 12:10:30 +020066 */
67/* Window base at flash base */
68#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_APP1_BASE
69/* Window size: 256 MB */
70#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
71
72#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_APP1_BASE | \
73 BR_PS_8 | \
74 BR_MS_GPCM | \
75 BR_V)
76
77#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
78 OR_GPCM_CSNT | \
79 OR_GPCM_ACS_DIV4 | \
80 OR_GPCM_SCY_2 | \
Joe Hershbergerf05b9332011-10-11 23:57:30 -050081 OR_GPCM_TRLX_SET | \
82 OR_GPCM_EHTR_CLEAR | \
Heiko Schocher8a410f82010-04-01 12:10:30 +020083 OR_GPCM_EAD)
Holger Brunck2a1c5bd2011-12-14 16:21:45 +010084#ifndef CONFIG_KM_DISABLE_APP2
Heiko Schocher8a410f82010-04-01 12:10:30 +020085/*
Holger Brunck4a630a72011-12-14 16:21:44 +010086 * Configuration for C3 on the local bus
Heiko Schocher8a410f82010-04-01 12:10:30 +020087 */
88/* Access window base at PINC3 base */
89#define CONFIG_SYS_LBLAWBAR3_PRELIM CONFIG_SYS_APP2_BASE
90/* Window size: 256 MB */
91#define CONFIG_SYS_LBLAWAR3_PRELIM (LBLAWAR_EN | LBLAWAR_256MB)
92
93#define CONFIG_SYS_BR3_PRELIM (CONFIG_SYS_APP2_BASE | \
94 BR_PS_8 | \
95 BR_MS_GPCM | \
96 BR_V)
97
98#define CONFIG_SYS_OR3_PRELIM (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
99 OR_GPCM_CSNT | \
Joe Hershbergerf05b9332011-10-11 23:57:30 -0500100 OR_GPCM_ACS_DIV2 | \
101 OR_GPCM_SCY_2 | \
102 OR_GPCM_TRLX_SET | \
103 OR_GPCM_EHTR_CLEAR)
Heiko Schocher8a410f82010-04-01 12:10:30 +0200104
105#define CONFIG_SYS_MAMR (MxMR_GPL_x4DIS | \
106 0x0000c000 | \
107 MxMR_WLFx_2X)
Holger Brunck2a1c5bd2011-12-14 16:21:45 +0100108#endif
Heiko Schocher8a410f82010-04-01 12:10:30 +0200109
110/*
111 * MMU Setup
112 */
Holger Brunck4a630a72011-12-14 16:21:44 +0100113/* APP1: icache cacheable, but dcache-inhibit and guarded */
Heiko Schocher8a410f82010-04-01 12:10:30 +0200114#define CONFIG_SYS_IBAT5L (CONFIG_SYS_APP1_BASE | \
Joe Hershbergerbfd89732011-10-11 23:57:28 -0500115 BATL_PP_RW | \
Heiko Schocher8a410f82010-04-01 12:10:30 +0200116 BATL_MEMCOHERENCE)
117/* 512M should also include APP2... */
118#define CONFIG_SYS_IBAT5U (CONFIG_SYS_APP1_BASE | \
119 BATU_BL_256M | \
120 BATU_VS | \
121 BATU_VP)
122#define CONFIG_SYS_DBAT5L (CONFIG_SYS_APP1_BASE | \
Joe Hershbergerbfd89732011-10-11 23:57:28 -0500123 BATL_PP_RW | \
Heiko Schocher8a410f82010-04-01 12:10:30 +0200124 BATL_CACHEINHIBIT | \
125 BATL_GUARDEDSTORAGE)
126#define CONFIG_SYS_DBAT5U CONFIG_SYS_IBAT5U
127
Holger Brunck2a1c5bd2011-12-14 16:21:45 +0100128#ifdef CONFIG_KM_DISABLE_APP2
129#define CONFIG_SYS_IBAT6L (0)
130#define CONFIG_SYS_IBAT6U (0)
131#define CONFIG_SYS_DBAT6L CONFIG_SYS_IBAT6L
132#else
Holger Brunck4a630a72011-12-14 16:21:44 +0100133/* APP2: icache cacheable, but dcache-inhibit and guarded */
Heiko Schocher8a410f82010-04-01 12:10:30 +0200134#define CONFIG_SYS_IBAT6L (CONFIG_SYS_APP2_BASE | \
Joe Hershbergerbfd89732011-10-11 23:57:28 -0500135 BATL_PP_RW | \
Heiko Schocher8a410f82010-04-01 12:10:30 +0200136 BATL_MEMCOHERENCE)
137#define CONFIG_SYS_IBAT6U (CONFIG_SYS_APP2_BASE | \
138 BATU_BL_256M | \
139 BATU_VS | \
140 BATU_VP)
141#define CONFIG_SYS_DBAT6L (CONFIG_SYS_APP2_BASE | \
Joe Hershbergerbfd89732011-10-11 23:57:28 -0500142 BATL_PP_RW | \
Heiko Schocher8a410f82010-04-01 12:10:30 +0200143 BATL_CACHEINHIBIT | \
144 BATL_GUARDEDSTORAGE)
Holger Brunck2a1c5bd2011-12-14 16:21:45 +0100145#endif
Heiko Schocher8a410f82010-04-01 12:10:30 +0200146#define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U
147
148#define CONFIG_SYS_IBAT7L (0)
149#define CONFIG_SYS_IBAT7U (0)
150#define CONFIG_SYS_DBAT7L CONFIG_SYS_IBAT7L
151#define CONFIG_SYS_DBAT7U CONFIG_SYS_IBAT7U
Heiko Schocher8a410f82010-04-01 12:10:30 +0200152
153#endif /* __CONFIG_H */