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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Anatolij Gustschin705bf372016-11-14 16:07:10 +01002/*
3 * Copyright Altera Corporation (C) 2015
Anatolij Gustschin705bf372016-11-14 16:07:10 +01004 */
5
6#include "socfpga_cyclone5.dtsi"
7
8/ {
9 model = "Terasic DE1-SoC";
10 compatible = "altr,socfpga-cyclone5", "altr,socfpga";
11
12 chosen {
13 bootargs = "console=ttyS0,115200";
Simon Goldschmidt3854a1a2018-08-13 21:34:33 +020014 stdout-path = "serial0:115200n8";
Anatolij Gustschin705bf372016-11-14 16:07:10 +010015 };
16
17 aliases {
18 ethernet0 = &gmac1;
19 udc0 = &usb1;
20 };
21
22 memory {
23 name = "memory";
24 device_type = "memory";
25 reg = <0x0 0x40000000>; /* 1GB */
26 };
27
28 soc {
29 u-boot,dm-pre-reloc;
30 };
31};
32
33&gmac1 {
34 status = "okay";
35 phy-mode = "rgmii";
36
37 rxd0-skew-ps = <420>;
38 rxd1-skew-ps = <420>;
39 rxd2-skew-ps = <420>;
40 rxd3-skew-ps = <420>;
41 txen-skew-ps = <0>;
42 txc-skew-ps = <1860>;
43 rxdv-skew-ps = <420>;
44 rxc-skew-ps = <1680>;
45};
46
47&gpio0 {
48 status = "okay";
49};
50
51&gpio1 {
52 status = "okay";
53};
54
55&gpio2 {
56 status = "okay";
57};
58
Simon Goldschmidt15616b52018-11-02 11:54:52 +010059&porta {
60 bank-name = "porta";
61};
62
63&portb {
64 bank-name = "portb";
65};
66
67&portc {
68 bank-name = "portc";
69};
70
Anatolij Gustschin705bf372016-11-14 16:07:10 +010071&mmc0 {
72 status = "okay";
73 u-boot,dm-pre-reloc;
74};
75
76&usb1 {
77 status = "okay";
78};
Simon Goldschmidt3854a1a2018-08-13 21:34:33 +020079
80&uart0 {
81 u-boot,dm-pre-reloc;
82};
Simon Goldschmidt15616b52018-11-02 11:54:52 +010083
84&watchdog0 {
85 status = "disabled";
86};