blob: f51f1121d0252b3b96f856bac574bc6b19fff6ce [file] [log] [blame]
wdenk591dda52002-11-18 00:14:45 +00001/*
Bin Meng8c5acf42014-12-12 21:05:22 +08002 * U-Boot - x86 Startup Code
wdenk591dda52002-11-18 00:14:45 +00003 *
Graeme Russ45fc1d82011-04-13 19:43:26 +10004 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002
Albert ARIBAUD60fbc8d2011-08-04 18:45:45 +02008 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk591dda52002-11-18 00:14:45 +00009 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +020010 * SPDX-License-Identifier: GPL-2.0+
wdenk591dda52002-11-18 00:14:45 +000011 */
12
wdenk591dda52002-11-18 00:14:45 +000013#include <config.h>
14#include <version.h>
Graeme Russ5fb91cc2010-10-07 20:03:29 +110015#include <asm/global_data.h>
Simon Glass245561d2014-11-12 22:42:09 -070016#include <asm/post.h>
Graeme Russ391bb952011-12-31 10:24:36 +110017#include <asm/processor.h>
Graeme Russ93efcb22011-02-12 15:11:32 +110018#include <asm/processor-flags.h>
Graeme Russ35368962011-12-31 22:58:15 +110019#include <generated/generic-asm-offsets.h>
Bin Meng8c5acf42014-12-12 21:05:22 +080020#include <generated/asm-offsets.h>
wdenk591dda52002-11-18 00:14:45 +000021
wdenk591dda52002-11-18 00:14:45 +000022.section .text
23.code32
24.globl _start
wdenk57b2d802003-06-27 21:31:46 +000025.type _start, @function
Graeme Russcbfce1d2011-04-13 19:43:28 +100026.globl _x86boot_start
27_x86boot_start:
Graeme Russ8accbb92010-04-24 00:05:42 +100028 /*
29 * This is the fail safe 32-bit bootstrap entry point. The
30 * following code is not executed from a cold-reset (actually, a
31 * lot of it is, but from real-mode after cold reset. It is
32 * repeated here to put the board into a state as close to cold
33 * reset as necessary)
34 */
35 cli
36 cld
37
Graeme Russc379b5d2011-11-08 02:33:23 +000038 /* Turn off cache (this might require a 486-class CPU) */
Graeme Russ8accbb92010-04-24 00:05:42 +100039 movl %cr0, %eax
Graeme Russ93efcb22011-02-12 15:11:32 +110040 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ8accbb92010-04-24 00:05:42 +100041 movl %eax, %cr0
42 wbinvd
43
Gabe Blackef899322012-11-03 11:41:28 +000044 /* Tell 32-bit code it is being entered from an in-RAM copy */
45 movw $GD_FLG_WARM_BOOT, %bx
46 jmp 1f
wdenk57b2d802003-06-27 21:31:46 +000047_start:
Gabe Blackef899322012-11-03 11:41:28 +000048 /*
49 * This is the 32-bit cold-reset entry point. Initialize %bx to 0
50 * in case we're preceeded by some sort of boot stub.
51 */
52 movw $GD_FLG_COLD_BOOT, %bx
531:
Simon Glass1f4476c2014-11-06 13:20:10 -070054 /* Save BIST */
55 movl %eax, %ebp
Graeme Russ8accbb92010-04-24 00:05:42 +100056
Graeme Russ45fc1d82011-04-13 19:43:26 +100057 /* Load the segement registes to match the gdt loaded in start16.S */
Graeme Russ391bb952011-12-31 10:24:36 +110058 movl $(X86_GDT_ENTRY_32BIT_DS * X86_GDT_ENTRY_SIZE), %eax
Graeme Russ3e6ec382010-10-07 20:03:21 +110059 movw %ax, %fs
60 movw %ax, %ds
61 movw %ax, %gs
62 movw %ax, %es
63 movw %ax, %ss
wdenk57b2d802003-06-27 21:31:46 +000064
Mike Williamsbf895ad2011-07-22 04:01:30 +000065 /* Clear the interrupt vectors */
Graeme Russ8accbb92010-04-24 00:05:42 +100066 lidt blank_idt_ptr
67
wdenk591dda52002-11-18 00:14:45 +000068 /* Early platform init (setup gpio, etc ) */
wdenk591dda52002-11-18 00:14:45 +000069 jmp early_board_init
Graeme Russ157b0e92010-10-07 20:03:27 +110070.globl early_board_init_ret
wdenk591dda52002-11-18 00:14:45 +000071early_board_init_ret:
Simon Glass245561d2014-11-12 22:42:09 -070072 post_code(POST_START)
wdenk57b2d802003-06-27 21:31:46 +000073
Graeme Russbc761932011-02-12 15:11:52 +110074 /* Initialise Cache-As-RAM */
75 jmp car_init
76.globl car_init_ret
77car_init_ret:
Bin Meng005f0af2014-12-12 21:05:31 +080078#ifndef CONFIG_HAVE_FSP
Graeme Russbc761932011-02-12 15:11:52 +110079 /*
80 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
81 * or fully initialised SDRAM - we really don't care which)
82 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
Simon Glass268eefd2014-11-12 22:42:28 -070083 * and early malloc area. The MRC requires some space at the top.
Simon Glassa4fd0db2014-11-06 13:20:04 -070084 *
85 * Stack grows down from top of CAR. We have:
86 *
87 * top-> CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE
Simon Glass268eefd2014-11-12 22:42:28 -070088 * MRC area
Simon Glassa4fd0db2014-11-06 13:20:04 -070089 * global_data
90 * x86 global descriptor table
91 * early malloc area
92 * stack
93 * bottom-> CONFIG_SYS_CAR_ADDR
Graeme Russbc761932011-02-12 15:11:52 +110094 */
Simon Glass268eefd2014-11-12 22:42:28 -070095 movl $(CONFIG_SYS_CAR_ADDR + CONFIG_SYS_CAR_SIZE - 4), %esp
96#ifdef CONFIG_DCACHE_RAM_MRC_VAR_SIZE
97 subl $CONFIG_DCACHE_RAM_MRC_VAR_SIZE, %esp
98#endif
Bin Meng005f0af2014-12-12 21:05:31 +080099#else
100 /*
101 * When we get here after car_init, esp points to a temporary stack
102 * and esi holds the HOB list address returned by the FSP.
103 */
104#endif
Graeme Russ007818a2012-11-27 15:38:36 +0000105
106 /* Reserve space on stack for global data */
107 subl $GENERATED_GBL_DATA_SIZE, %esp
108
109 /* Align global data to 16-byte boundary */
110 andl $0xfffffff0, %esp
Simon Glass245561d2014-11-12 22:42:09 -0700111 post_code(POST_START_STACK)
Graeme Russ007818a2012-11-27 15:38:36 +0000112
Simon Glass73e44fb2014-10-10 07:49:15 -0600113 /* Zero the global data since it won't happen later */
114 xorl %eax, %eax
115 movl $GENERATED_GBL_DATA_SIZE, %ecx
116 movl %esp, %edi
117 rep stosb
118
Bin Meng005f0af2014-12-12 21:05:31 +0800119#ifdef CONFIG_HAVE_FSP
120 /* Store HOB list */
121 movl %esp, %edx
122 addl $GD_HOB_LIST, %edx
123 movl %esi, (%edx)
124#endif
125
Simon Glassa4fd0db2014-11-06 13:20:04 -0700126 /* Setup first parameter to setup_gdt, pointer to global_data */
Graeme Russ007818a2012-11-27 15:38:36 +0000127 movl %esp, %eax
128
129 /* Reserve space for global descriptor table */
130 subl $X86_GDT_SIZE, %esp
131
Simon Glassa4fd0db2014-11-06 13:20:04 -0700132 /* Align temporary global descriptor table to 16-byte boundary */
133 andl $0xfffffff0, %esp
134 movl %esp, %ecx
135
Simon Glassb24a9512014-10-10 07:49:16 -0600136#if defined(CONFIG_SYS_MALLOC_F_LEN)
137 subl $CONFIG_SYS_MALLOC_F_LEN, %esp
138 movl %eax, %edx
139 addl $GD_MALLOC_BASE, %edx
140 movl %esp, (%edx)
141#endif
Simon Glass1f4476c2014-11-06 13:20:10 -0700142 /* Store BIST */
143 movl %eax, %edx
144 addl $GD_BIST, %edx
145 movl %ebp, (%edx)
Graeme Russ007818a2012-11-27 15:38:36 +0000146
147 /* Set second parameter to setup_gdt */
Simon Glassa4fd0db2014-11-06 13:20:04 -0700148 movl %ecx, %edx
Graeme Russ007818a2012-11-27 15:38:36 +0000149
Graeme Russ007818a2012-11-27 15:38:36 +0000150 /* Setup global descriptor table so gd->xyz works */
151 call setup_gdt
Graeme Russ35368962011-12-31 22:58:15 +1100152
Graeme Russ38183932011-02-12 15:11:54 +1100153 /* Set parameter to board_init_f() to boot flags */
Simon Glass245561d2014-11-12 22:42:09 -0700154 post_code(POST_START_DONE)
Graeme Russ45fc1d82011-04-13 19:43:26 +1000155 xorl %eax, %eax
Graeme Russ5fb91cc2010-10-07 20:03:29 +1100156
Graeme Russ45fc1d82011-04-13 19:43:26 +1000157 /* Enter, U-boot! */
158 call board_init_f
wdenk591dda52002-11-18 00:14:45 +0000159
160 /* indicate (lack of) progress */
wdenk57b2d802003-06-27 21:31:46 +0000161 movw $0x85, %ax
Graeme Russ9c44afc2011-02-12 15:11:58 +1100162 jmp die
163
Graeme Russd7755b42012-01-01 15:06:39 +1100164.globl board_init_f_r_trampoline
165.type board_init_f_r_trampoline, @function
166board_init_f_r_trampoline:
Graeme Russ9c44afc2011-02-12 15:11:58 +1100167 /*
168 * SDRAM has been initialised, U-Boot code has been copied into
169 * RAM, BSS has been cleared and relocation adjustments have been
170 * made. It is now time to jump into the in-RAM copy of U-Boot
171 *
Graeme Russd7755b42012-01-01 15:06:39 +1100172 * %eax = Address of top of new stack
Graeme Russ9c44afc2011-02-12 15:11:58 +1100173 */
174
Graeme Russ007818a2012-11-27 15:38:36 +0000175 /* Stack grows down from top of SDRAM */
Graeme Russ9c44afc2011-02-12 15:11:58 +1100176 movl %eax, %esp
177
Graeme Russ007818a2012-11-27 15:38:36 +0000178 /* Reserve space on stack for global data */
179 subl $GENERATED_GBL_DATA_SIZE, %esp
180
181 /* Align global data to 16-byte boundary */
182 andl $0xfffffff0, %esp
183
184 /* Setup first parameter to memcpy (and setup_gdt) */
185 movl %esp, %eax
186
187 /* Setup second parameter to memcpy */
188 fs movl 0, %edx
189
190 /* Set third parameter to memcpy */
191 movl $GENERATED_GBL_DATA_SIZE, %ecx
192
193 /* Copy global data from CAR to SDRAM stack */
194 call memcpy
195
196 /* Reserve space for global descriptor table */
197 subl $X86_GDT_SIZE, %esp
198
199 /* Align global descriptor table to 16-byte boundary */
200 andl $0xfffffff0, %esp
201
202 /* Set second parameter to setup_gdt */
203 movl %esp, %edx
204
Graeme Russ007818a2012-11-27 15:38:36 +0000205 /* Setup global descriptor table so gd->xyz works */
206 call setup_gdt
207
Simon Glass78da72c2015-01-01 16:18:13 -0700208 /* Set if we need to disable CAR */
209.weak car_uninit
210 movl $car_uninit, %eax
211 cmpl $0, %eax
212 jz 1f
213
214 call car_uninit
2151:
Graeme Russd7755b42012-01-01 15:06:39 +1100216 /* Re-enter U-Boot by calling board_init_f_r */
217 call board_init_f_r
Graeme Russ9c44afc2011-02-12 15:11:58 +1100218
Graeme Russc379b5d2011-11-08 02:33:23 +0000219die:
220 hlt
wdenk591dda52002-11-18 00:14:45 +0000221 jmp die
wdenk57b2d802003-06-27 21:31:46 +0000222 hlt
Graeme Russ8accbb92010-04-24 00:05:42 +1000223
224blank_idt_ptr:
225 .word 0 /* limit */
226 .long 0 /* base */
Graeme Russ786c3952011-11-08 02:33:19 +0000227
228 .p2align 2 /* force 4-byte alignment */
229
230multiboot_header:
231 /* magic */
232 .long 0x1BADB002
233 /* flags */
234 .long (1 << 16)
235 /* checksum */
236 .long -0x1BADB002 - (1 << 16)
237 /* header addr */
238 .long multiboot_header - _x86boot_start + CONFIG_SYS_TEXT_BASE
239 /* load addr */
240 .long CONFIG_SYS_TEXT_BASE
241 /* load end addr */
242 .long 0
243 /* bss end addr */
244 .long 0
245 /* entry addr */
246 .long CONFIG_SYS_TEXT_BASE