Reinhard Meyer | 8ec18f4 | 2010-07-27 15:18:38 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2010 |
| 3 | * Reinhard Meyer, reinhard.meyer@emk-elektronik.de |
| 4 | * |
| 5 | * Enhanced Embedded Flash Controller |
| 6 | * Based on AT91SAM9XE datasheet |
| 7 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Reinhard Meyer | 8ec18f4 | 2010-07-27 15:18:38 +0200 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #ifndef AT91_EEFC_H |
| 12 | #define AT91_EEFC_H |
| 13 | |
| 14 | #ifndef __ASSEMBLY__ |
| 15 | |
| 16 | typedef struct at91_eefc { |
| 17 | u32 fmr; /* Flash Mode Register RW */ |
| 18 | u32 fcr; /* Flash Command Register WO */ |
| 19 | u32 fsr; /* Flash Status Register RO */ |
| 20 | u32 frr; /* Flash Result Register RO */ |
| 21 | } at91_eefc_t; |
| 22 | |
| 23 | #endif /* __ASSEMBLY__ */ |
| 24 | |
| 25 | #define AT91_EEFC_FMR_FWS_MASK 0x00000f00 |
| 26 | #define AT91_EEFC_FMR_FRDY_BIT 0x00000001 |
| 27 | |
| 28 | #define AT91_EEFC_FCR_KEY 0x5a000000 |
| 29 | #define AT91_EEFC_FCR_FARG_MASK 0x00ffff00 |
| 30 | #define AT91_EEFC_FCR_FARG_SHIFT 8 |
| 31 | #define AT91_EEFC_FCR_FCMD_GETD 0x0 |
| 32 | #define AT91_EEFC_FCR_FCMD_WP 0x1 |
| 33 | #define AT91_EEFC_FCR_FCMD_WPL 0x2 |
| 34 | #define AT91_EEFC_FCR_FCMD_EWP 0x3 |
| 35 | #define AT91_EEFC_FCR_FCMD_EWPL 0x4 |
| 36 | #define AT91_EEFC_FCR_FCMD_EA 0x5 |
| 37 | #define AT91_EEFC_FCR_FCMD_SLB 0x8 |
| 38 | #define AT91_EEFC_FCR_FCMD_CLB 0x9 |
| 39 | #define AT91_EEFC_FCR_FCMD_GLB 0xA |
| 40 | #define AT91_EEFC_FCR_FCMD_SGPB 0xB |
| 41 | #define AT91_EEFC_FCR_FCMD_CGPB 0xC |
| 42 | #define AT91_EEFC_FCR_FCMD_GGPB 0xD |
| 43 | |
| 44 | #define AT91_EEFC_FSR_FRDY 1 |
| 45 | #define AT91_EEFC_FSR_FCMDE 2 |
| 46 | #define AT91_EEFC_FSR_FLOCKE 4 |
| 47 | |
| 48 | #endif |