Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 2 | /* |
| 3 | * Copyright 2015 Freescale Semiconductor, Inc. |
Yangbo Lu | 49dd6e4 | 2019-05-23 11:05:45 +0800 | [diff] [blame] | 4 | * Copyright 2019 NXP Semiconductors |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 5 | * |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #ifndef __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ |
| 9 | #define __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ |
| 10 | |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 11 | enum mxc_clock { |
| 12 | MXC_ARM_CLK = 0, |
| 13 | MXC_BUS_CLK, |
| 14 | MXC_UART_CLK, |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 15 | MXC_I2C_CLK, |
| 16 | MXC_DSPI_CLK, |
| 17 | }; |
| 18 | |
| 19 | unsigned int mxc_get_clock(enum mxc_clock clk); |
Simon Glass | 243182c | 2017-05-17 08:23:06 -0600 | [diff] [blame] | 20 | ulong get_ddr_freq(ulong); |
| 21 | uint get_svr(void); |
Mingkai Hu | 0e58b51 | 2015-10-26 19:47:50 +0800 | [diff] [blame] | 22 | |
| 23 | #endif /* __ASM_ARCH_FSL_LAYERSCAPE_CLOCK_H_ */ |