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Simon Glass4c0dc6d2013-03-05 14:39:35 +00001/*
2 * Copyright (c) 2011 The Chromium OS Authors.
3 *
4 * (C) Copyright 2000 - 2002
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
6 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Simon Glass4c0dc6d2013-03-05 14:39:35 +00008 ********************************************************************
9 * NOTE: This header file defines an interface to U-Boot. Including
10 * this (unmodified) header file in another file is considered normal
11 * use of U-Boot, and does *not* fall under the heading of "derived
12 * work".
13 ********************************************************************
14 */
15
16#ifndef __ASM_GENERIC_U_BOOT_H__
17#define __ASM_GENERIC_U_BOOT_H__
18
19/*
20 * Board information passed to Linux kernel from U-Boot
21 *
22 * include/asm-ppc/u-boot.h
23 */
24
25#ifndef __ASSEMBLY__
26
27typedef struct bd_info {
28 unsigned long bi_memstart; /* start of DRAM memory */
29 phys_size_t bi_memsize; /* size of DRAM memory in bytes */
30 unsigned long bi_flashstart; /* start of FLASH memory */
31 unsigned long bi_flashsize; /* size of FLASH memory */
32 unsigned long bi_flashoffset; /* reserved area for startup monitor */
33 unsigned long bi_sramstart; /* start of SRAM memory */
34 unsigned long bi_sramsize; /* size of SRAM memory */
35#ifdef CONFIG_ARM
36 unsigned long bi_arm_freq; /* arm frequency */
37 unsigned long bi_dsp_freq; /* dsp core frequency */
38 unsigned long bi_ddr_freq; /* ddr frequency */
39#endif
Masahiro Yamada5a2bf982014-03-05 17:40:10 +090040#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_MPC8260) \
Simon Glass4c0dc6d2013-03-05 14:39:35 +000041 || defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
42 unsigned long bi_immr_base; /* base of IMMR register */
43#endif
44#if defined(CONFIG_MPC5xxx)
45 unsigned long bi_mbar_base; /* base of internal registers */
46#endif
47#if defined(CONFIG_MPC83xx)
48 unsigned long bi_immrbar;
49#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000050 unsigned long bi_bootflags; /* boot / reboot flag (Unused) */
51 unsigned long bi_ip_addr; /* IP Address */
52 unsigned char bi_enetaddr[6]; /* OLD: see README.enetaddr */
53 unsigned short bi_ethspeed; /* Ethernet speed in Mbps */
54 unsigned long bi_intfreq; /* Internal Freq, in MHz */
55 unsigned long bi_busfreq; /* Bus Freq, in MHz */
56#if defined(CONFIG_CPM2)
57 unsigned long bi_cpmfreq; /* CPM_CLK Freq, in MHz */
58 unsigned long bi_brgfreq; /* BRG_CLK Freq, in MHz */
59 unsigned long bi_sccfreq; /* SCC_CLK Freq, in MHz */
60 unsigned long bi_vco; /* VCO Out from PLL, in MHz */
61#endif
62#if defined(CONFIG_MPC512X)
63 unsigned long bi_ipsfreq; /* IPS Bus Freq, in MHz */
64#endif /* CONFIG_MPC512X */
65#if defined(CONFIG_MPC5xxx)
66 unsigned long bi_ipbfreq; /* IPB Bus Freq, in MHz */
67 unsigned long bi_pcifreq; /* PCI Bus Freq, in MHz */
68#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000069#if defined(CONFIG_405) || \
70 defined(CONFIG_405GP) || \
Simon Glass4c0dc6d2013-03-05 14:39:35 +000071 defined(CONFIG_405EP) || \
72 defined(CONFIG_405EZ) || \
73 defined(CONFIG_405EX) || \
74 defined(CONFIG_440)
75 unsigned char bi_s_version[4]; /* Version of this structure */
76 unsigned char bi_r_version[32]; /* Version of the ROM (AMCC) */
77 unsigned int bi_procfreq; /* CPU (Internal) Freq, in Hz */
78 unsigned int bi_plb_busfreq; /* PLB Bus speed, in Hz */
79 unsigned int bi_pci_busfreq; /* PCI Bus speed, in Hz */
80 unsigned char bi_pci_enetaddr[6]; /* PCI Ethernet MAC address */
81#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +000082
83#ifdef CONFIG_HAS_ETH1
84 unsigned char bi_enet1addr[6]; /* OLD: see README.enetaddr */
85#endif
86#ifdef CONFIG_HAS_ETH2
87 unsigned char bi_enet2addr[6]; /* OLD: see README.enetaddr */
88#endif
89#ifdef CONFIG_HAS_ETH3
90 unsigned char bi_enet3addr[6]; /* OLD: see README.enetaddr */
91#endif
92#ifdef CONFIG_HAS_ETH4
93 unsigned char bi_enet4addr[6]; /* OLD: see README.enetaddr */
94#endif
95#ifdef CONFIG_HAS_ETH5
96 unsigned char bi_enet5addr[6]; /* OLD: see README.enetaddr */
97#endif
98
99#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
100 defined(CONFIG_405EZ) || defined(CONFIG_440GX) || \
101 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
102 defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \
103 defined(CONFIG_460EX) || defined(CONFIG_460GT)
104 unsigned int bi_opbfreq; /* OPB clock in Hz */
105 int bi_iic_fast[2]; /* Use fast i2c mode */
106#endif
Simon Glass4c0dc6d2013-03-05 14:39:35 +0000107#if defined(CONFIG_4xx)
108#if defined(CONFIG_440GX) || \
109 defined(CONFIG_460EX) || defined(CONFIG_460GT)
110 int bi_phynum[4]; /* Determines phy mapping */
111 int bi_phymode[4]; /* Determines phy mode */
112#elif defined(CONFIG_405EP) || defined(CONFIG_405EX) || defined(CONFIG_440)
113 int bi_phynum[2]; /* Determines phy mapping */
114 int bi_phymode[2]; /* Determines phy mode */
115#else
116 int bi_phynum[1]; /* Determines phy mapping */
117 int bi_phymode[1]; /* Determines phy mode */
118#endif
119#endif /* defined(CONFIG_4xx) */
120 ulong bi_arch_number; /* unique id for this board */
121 ulong bi_boot_params; /* where this board expects params */
122#ifdef CONFIG_NR_DRAM_BANKS
123 struct { /* RAM configuration */
124 ulong start;
125 ulong size;
126 } bi_dram[CONFIG_NR_DRAM_BANKS];
127#endif /* CONFIG_NR_DRAM_BANKS */
128} bd_t;
129
130#endif /* __ASSEMBLY__ */
131
132#endif /* __ASM_GENERIC_U_BOOT_H__ */