blob: e880fe59aef0f4866fea3f9dddb0621216d33b72 [file] [log] [blame]
Marek Vasut0f97ed02020-04-29 20:09:08 +02001/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * Copyright 2018 NXP
4 */
5
6#ifndef __IMX8M_PICOPI_H
7#define __IMX8M_PICOPI_H
8
9#include <linux/sizes.h>
10#include <asm/arch/imx-regs.h>
11
12#define CONFIG_SPL_MAX_SIZE (124 * 1024)
13#define CONFIG_SYS_MONITOR_LEN (512 * 1024)
14#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
15#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
16#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
17
18#ifdef CONFIG_SPL_BUILD
19/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
20#define CONFIG_SPL_WATCHDOG_SUPPORT
21#define CONFIG_SPL_DRIVERS_MISC_SUPPORT
22#define CONFIG_SPL_POWER_SUPPORT
23#define CONFIG_SPL_I2C_SUPPORT
24#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv8/u-boot-spl.lds"
25#define CONFIG_SPL_STACK 0x187FF0
26#define CONFIG_SPL_LIBCOMMON_SUPPORT
27#define CONFIG_SPL_LIBGENERIC_SUPPORT
28#define CONFIG_SPL_GPIO_SUPPORT
29#define CONFIG_SPL_MMC_SUPPORT
30#define CONFIG_SPL_BSS_START_ADDR 0x00180000
31#define CONFIG_SPL_BSS_MAX_SIZE 0x2000 /* 8 KB */
32#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
33#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000 /* 512 KB */
34#define CONFIG_SYS_SPL_PTE_RAM_BASE 0x41580000
35
36/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
37#define CONFIG_MALLOC_F_ADDR 0x182000
38/* For RAW image gives a error info not panic */
39#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
40
41#undef CONFIG_DM_MMC
42#undef CONFIG_DM_PMIC
43
44#define CONFIG_SYS_I2C
45#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
46#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
47#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
48
49#define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
50
51#define CONFIG_POWER
52#define CONFIG_POWER_I2C
53#endif
54
55#define CONFIG_REMAKE_ELF
56
Marek Vasut0f97ed02020-04-29 20:09:08 +020057/* ENET Config */
58/* ENET1 */
59#if defined(CONFIG_CMD_NET)
Marek Vasut0f97ed02020-04-29 20:09:08 +020060#define CONFIG_MII
61#define CONFIG_ETHPRIME "FEC"
62
63#define CONFIG_FEC_MXC
64#define CONFIG_FEC_XCV_TYPE RGMII
65#define CONFIG_FEC_MXC_PHYADDR 1
66#define FEC_QUIRK_ENET_MAC
67
68#define CONFIG_PHY_GIGE
69#define IMX_FEC_BASE 0x30BE0000
70
71#define CONFIG_PHYLIB
72#define CONFIG_PHY_ATHEROS
73#endif
74
75/* Initial environment variables */
76#define CONFIG_EXTRA_ENV_SETTINGS \
77 "script=boot.scr\0" \
78 "image=Image\0" \
79 "console=ttymxc0,115200\0" \
80 "fdt_addr=0x43000000\0" \
81 "fdt_high=0xffffffffffffffff\0" \
82 "fdt_file=imx8mq-pico-pi.dtb\0" \
83 "initrd_addr=0x43800000\0" \
84 "initrd_high=0xffffffffffffffff\0" \
85 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
86 "mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
87 "mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
88 "mmcautodetect=yes\0" \
89 "mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
90 "loadbootscript=" \
91 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
92 "bootscript=echo Running bootscript from mmc ...; source\0" \
93 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
94 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
95 "mmcboot=echo Booting from mmc ...; " \
96 "run mmcargs; " \
97 "echo wait for boot; " \
98 "fi;\0" \
99 "netargs=setenv bootargs console=${console} " \
100 "root=/dev/nfs " \
101 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
102 "netboot=echo Booting from net ...; " \
103 "run netargs; " \
104 "if test ${ip_dyn} = yes; then " \
105 "setenv get_cmd dhcp; " \
106 "else " \
107 "setenv get_cmd tftp; " \
108 "fi; " \
109 "${get_cmd} ${loadaddr} ${image}; " \
110 "booti; "
111
112#define CONFIG_BOOTCOMMAND \
113 "mmc dev ${mmcdev}; if mmc rescan; then " \
114 "if run loadbootscript; then " \
115 "run bootscript; " \
116 "else " \
117 "if run loadimage; then " \
118 "run mmcboot; " \
119 "else run netboot; " \
120 "fi; " \
121 "fi; " \
122 "else booti ${loadaddr} - ${fdt_addr}; fi"
123
124/* Link Definitions */
125#define CONFIG_LOADADDR 0x40480000
126
127#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
128
129#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
130#define CONFIG_SYS_INIT_RAM_SIZE 0x80000
131#define CONFIG_SYS_INIT_SP_OFFSET \
132 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
133#define CONFIG_SYS_INIT_SP_ADDR \
134 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
135
136#define CONFIG_ENV_OVERWRITE
137#define CONFIG_SYS_MMC_ENV_DEV 1 /* USDHC2 */
138#define CONFIG_MMCROOT "/dev/mmcblk1p2" /* USDHC2 */
139
140/* Size of malloc() pool */
141#define CONFIG_SYS_MALLOC_LEN ((CONFIG_ENV_SIZE + (2 * 1024)) * 1024)
142
143#define CONFIG_SYS_SDRAM_BASE 0x40000000
144#define PHYS_SDRAM 0x40000000
145#define PHYS_SDRAM_SIZE 0x80000000 /* 2 GiB DDR */
146
147#define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
148#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
149 (PHYS_SDRAM_SIZE >> 1))
150
Marek Vasut0f97ed02020-04-29 20:09:08 +0200151#define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
152
153/* Monitor Command Prompt */
154#define CONFIG_SYS_CBSIZE 1024
155#define CONFIG_SYS_MAXARGS 64
156#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
157#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
158 sizeof(CONFIG_SYS_PROMPT) + 16)
159
160#define CONFIG_IMX_BOOTAUX
161
Marek Vasut0f97ed02020-04-29 20:09:08 +0200162#define CONFIG_SYS_FSL_USDHC_NUM 2
163#define CONFIG_SYS_FSL_ESDHC_ADDR 0
164
165#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
166
167#define CONFIG_MXC_GPIO
168
Marek Vasut0f97ed02020-04-29 20:09:08 +0200169/* I2C Configs */
170#define CONFIG_SYS_I2C_SPEED 100000
171
172#define CONFIG_OF_SYSTEM_SETUP
173
174#ifndef CONFIG_SPL_BUILD
175#define CONFIG_DM_PMIC
176#endif
177
178#define CONFIG_SYS_BOOTM_LEN SZ_128M
179
180#endif