Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 1 | if RCAR_32 |
2 | |||||
Marek Vasut | c97610d | 2024-02-27 17:05:52 +0100 | [diff] [blame] | 3 | config ARCH_RENESAS_BOARD_STRING |
Marek Vasut | ffb703d | 2018-05-02 11:42:22 +0200 | [diff] [blame] | 4 | string "Renesas RCar Gen2 board name" |
5 | default "Board" | ||||
6 | |||||
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 7 | config RCAR_GEN2 |
8 | bool "Renesas RCar Gen2" | ||||
Marek Vasut | c74a378 | 2018-08-08 15:06:03 +0200 | [diff] [blame] | 9 | select PHY |
10 | select PHY_RCAR_GEN2 | ||||
Tom Rini | c48c040 | 2022-11-19 18:45:32 -0500 | [diff] [blame] | 11 | select TMU_TIMER |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 12 | |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 13 | config R8A7790 |
14 | bool "Renesas SoC R8A7790" | ||||
15 | select RCAR_GEN2 | ||||
Marek Vasut | acbb10c | 2018-06-30 08:07:41 +0200 | [diff] [blame] | 16 | select ARM_CORTEX_A15_CVE_2017_5715 |
Marek Vasut | 71710b5 | 2019-02-18 13:20:48 +0100 | [diff] [blame] | 17 | imply CLK_R8A7790 |
Marek Vasut | 9c93052 | 2019-02-18 13:22:03 +0100 | [diff] [blame] | 18 | imply PINCTRL_PFC_R8A7790 |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 19 | |
20 | config R8A7791 | ||||
21 | bool "Renesas SoC R8A7791" | ||||
22 | select RCAR_GEN2 | ||||
Marek Vasut | acbb10c | 2018-06-30 08:07:41 +0200 | [diff] [blame] | 23 | select ARM_CORTEX_A15_CVE_2017_5715 |
Marek Vasut | 71710b5 | 2019-02-18 13:20:48 +0100 | [diff] [blame] | 24 | imply CLK_R8A7791 |
Marek Vasut | 9c93052 | 2019-02-18 13:22:03 +0100 | [diff] [blame] | 25 | imply PINCTRL_PFC_R8A7791 |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 26 | |
27 | config R8A7792 | ||||
28 | bool "Renesas SoC R8A7792" | ||||
29 | select RCAR_GEN2 | ||||
Marek Vasut | acbb10c | 2018-06-30 08:07:41 +0200 | [diff] [blame] | 30 | select ARM_CORTEX_A15_CVE_2017_5715 |
Marek Vasut | 71710b5 | 2019-02-18 13:20:48 +0100 | [diff] [blame] | 31 | imply CLK_R8A7792 |
Marek Vasut | 9c93052 | 2019-02-18 13:22:03 +0100 | [diff] [blame] | 32 | imply PINCTRL_PFC_R8A7792 |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 33 | |
34 | config R8A7793 | ||||
35 | bool "Renesas SoC R8A7793" | ||||
36 | select RCAR_GEN2 | ||||
Marek Vasut | acbb10c | 2018-06-30 08:07:41 +0200 | [diff] [blame] | 37 | select ARM_CORTEX_A15_CVE_2017_5715 |
Marek Vasut | 71710b5 | 2019-02-18 13:20:48 +0100 | [diff] [blame] | 38 | imply CLK_R8A7793 |
Marek Vasut | 9c93052 | 2019-02-18 13:22:03 +0100 | [diff] [blame] | 39 | imply PINCTRL_PFC_R8A7793 |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 40 | |
41 | config R8A7794 | ||||
42 | bool "Renesas SoC R8A7794" | ||||
43 | select RCAR_GEN2 | ||||
Marek Vasut | 71710b5 | 2019-02-18 13:20:48 +0100 | [diff] [blame] | 44 | imply CLK_R8A7794 |
Marek Vasut | 9c93052 | 2019-02-18 13:22:03 +0100 | [diff] [blame] | 45 | imply PINCTRL_PFC_R8A7794 |
Marek Vasut | 8f9a818 | 2018-01-07 19:37:06 +0100 | [diff] [blame] | 46 | |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 47 | choice |
Chris Brandt | d3d1f72 | 2017-11-03 10:36:12 -0500 | [diff] [blame] | 48 | prompt "Renesas ARM SoCs board select" |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 49 | optional |
50 | |||||
masakazu.mochizuki.wd@hitachi.com | 9d0e937 | 2016-04-12 17:11:41 +0900 | [diff] [blame] | 51 | config TARGET_BLANCHE |
52 | bool "Blanche board" | ||||
53 | select DM | ||||
54 | select DM_SERIAL | ||||
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 55 | imply CMD_DM |
masakazu.mochizuki.wd@hitachi.com | 9d0e937 | 2016-04-12 17:11:41 +0900 | [diff] [blame] | 56 | |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 57 | config TARGET_GOSE |
58 | bool "Gose board" | ||||
59 | select DM | ||||
60 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 61 | select SPL_TINY_MEMSET |
Marek Vasut | 2d6dabc | 2018-04-23 20:24:10 +0200 | [diff] [blame] | 62 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 63 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 64 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 65 | |
66 | config TARGET_KOELSCH | ||||
67 | bool "Koelsch board" | ||||
68 | select DM | ||||
69 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 70 | select SPL_TINY_MEMSET |
Marek Vasut | b0fd6e2 | 2018-04-17 14:13:11 +0200 | [diff] [blame] | 71 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 72 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 73 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 74 | |
75 | config TARGET_LAGER | ||||
76 | bool "Lager board" | ||||
77 | select DM | ||||
78 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 79 | select SPL_TINY_MEMSET |
Marek Vasut | 016a605 | 2018-04-23 20:24:06 +0200 | [diff] [blame] | 80 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 81 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 82 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 83 | |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 84 | config TARGET_ALT |
85 | bool "Alt board" | ||||
86 | select DM | ||||
87 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 88 | select SPL_TINY_MEMSET |
Marek Vasut | 37381a2 | 2018-04-23 20:24:16 +0200 | [diff] [blame] | 89 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 90 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 91 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 92 | |
93 | config TARGET_SILK | ||||
94 | bool "Silk board" | ||||
95 | select DM | ||||
96 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 97 | select SPL_TINY_MEMSET |
Marek Vasut | 52e0ee3 | 2018-04-21 16:19:56 +0200 | [diff] [blame] | 98 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 99 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 100 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 101 | |
102 | config TARGET_PORTER | ||||
103 | bool "Porter board" | ||||
104 | select DM | ||||
105 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 106 | select SPL_TINY_MEMSET |
Marek Vasut | 1046906 | 2018-02-16 01:33:27 +0100 | [diff] [blame] | 107 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 108 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 109 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 110 | |
111 | config TARGET_STOUT | ||||
112 | bool "Stout board" | ||||
113 | select DM | ||||
114 | select DM_SERIAL | ||||
Michal Simek | 84f3dec | 2018-07-23 15:55:13 +0200 | [diff] [blame] | 115 | select SPL_TINY_MEMSET |
Marek Vasut | 3320a22 | 2018-04-12 15:23:46 +0200 | [diff] [blame] | 116 | select SUPPORT_SPL |
Simon Glass | 7611ac6 | 2019-09-25 08:56:27 -0600 | [diff] [blame] | 117 | select SPL_USE_TINY_PRINTF |
Michal Simek | 2e7c819 | 2018-07-23 15:55:14 +0200 | [diff] [blame] | 118 | imply CMD_DM |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 119 | |
120 | endchoice | ||||
121 | |||||
Tom Rini | c48c040 | 2022-11-19 18:45:32 -0500 | [diff] [blame] | 122 | config TMU_TIMER |
123 | bool | ||||
124 | |||||
Marek Vasut | d26aa8c | 2024-02-27 17:05:53 +0100 | [diff] [blame] | 125 | config RENESAS_EXTRAM_BOOT |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 126 | bool "Enable boot from RAM" |
masakazu.mochizuki.wd@hitachi.com | 9d0e937 | 2016-04-12 17:11:41 +0900 | [diff] [blame] | 127 | depends on TARGET_ALT || TARGET_BLANCHE || TARGET_KOELSCH || TARGET_LAGER || TARGET_PORTER || TARGET_SILK || TARGET_STOUT |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 128 | |
129 | choice | ||||
130 | prompt "Qos setting primary" | ||||
masakazu.mochizuki.wd@hitachi.com | 9d0e937 | 2016-04-12 17:11:41 +0900 | [diff] [blame] | 131 | depends on TARGET_ALT || TARGET_BLANCHE || TARGET_GOSE || TARGET_KOELSCH || TARGET_LAGER |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 132 | default QOS_PRI_NORMAL |
133 | |||||
134 | config QOS_PRI_NORMAL | ||||
135 | bool "Non primary" | ||||
136 | help | ||||
137 | Select normal mode for QoS setting. | ||||
138 | |||||
139 | config QOS_PRI_MEDIA | ||||
140 | bool "Media primary" | ||||
141 | help | ||||
142 | Select multimedia primary mode for QoS setting. | ||||
143 | |||||
144 | config QOS_PRI_GFX | ||||
145 | bool "GFX primary" | ||||
146 | help | ||||
147 | Select GFX(graphics) primary mode for QoS setting. | ||||
148 | |||||
149 | endchoice | ||||
150 | |||||
masakazu.mochizuki.wd@hitachi.com | 9d0e937 | 2016-04-12 17:11:41 +0900 | [diff] [blame] | 151 | source "board/renesas/blanche/Kconfig" |
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 152 | source "board/renesas/gose/Kconfig" |
153 | source "board/renesas/koelsch/Kconfig" | ||||
154 | source "board/renesas/lager/Kconfig" | ||||
Nobuhiro Iwamatsu | b2c0e49 | 2016-06-17 13:52:13 +0900 | [diff] [blame] | 155 | source "board/renesas/alt/Kconfig" |
156 | source "board/renesas/silk/Kconfig" | ||||
157 | source "board/renesas/porter/Kconfig" | ||||
158 | source "board/renesas/stout/Kconfig" | ||||
159 | |||||
160 | endif |