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git01.mediatek.com / filogic / uboot / 4efcc64ed6e17018134d1deca38ee6f36b1d7818 / . / include / configs / sheevaplug.h
blob: 0cc58c3a7d98eebcee43ddeb9e13e6e385829736 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]2/*
DrEagle9ea48002014-09-07 18:01:21 +0200[diff] [blame]3 * (C) Copyright 2009-2014
4 * Gerald Kerma <dreagle@doukki.net>
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]5 * Marvell Semiconductor <www.marvell.com>
6 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]7 */
8
9#ifndef _CONFIG_SHEEVAPLUG_H
10#define _CONFIG_SHEEVAPLUG_H
11
Tom Rinib7b337b2021-12-17 18:08:44 -0500[diff] [blame]12#include "mv-common.h"
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]13
14/*
15 * Environment variables configurations
16 */
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]17/*
18 * max 4k env size is enough, but in case of nand
19 * it has to be rounded to sector size
20 */
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]21
22/*
23 * Default environment variables
24 */
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]25
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]26#define CONFIG_EXTRA_ENV_SETTINGS "x_bootargs=console" \
Tom Rini5ad8e112017-10-22 17:55:07 -0400[diff] [blame]27 "=ttyS0,115200 mtdparts="CONFIG_MTDPARTS_DEFAULT \
Peter Korsgaard280eb452016-01-17 18:23:45 +0100[diff] [blame]28 "x_bootcmd_kernel=nand read 0x6400000 0x100000 0x400000\0" \
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]29 "x_bootcmd_usb=usb start\0" \
30 "x_bootargs_root=root=/dev/mtdblock3 rw rootfstype=jffs2\0"
31
32/*
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]33 * Ethernet Driver configuration
34 */
35#ifdef CONFIG_CMD_NET
Albert Aribaude91d7d32010-07-12 22:24:28 +0200[diff] [blame]36#define CONFIG_MVGBE_PORTS {1, 0} /* enable port 0 only */
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]37#define CONFIG_PHY_BASE_ADR 0
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]38#endif /* CONFIG_CMD_NET */
39
40/*
DrEagle9ea48002014-09-07 18:01:21 +0200[diff] [blame]41 * SATA driver configuration
42 */
Tony Dinh488c519d2021-07-13 21:35:46 -0700[diff] [blame]43#ifdef CONFIG_SATA
Tony Dinh488c519d2021-07-13 21:35:46 -0700[diff] [blame]44#define CONFIG_LBA48
45#endif /* CONFIG_SATA */
DrEagle9ea48002014-09-07 18:01:21 +0200[diff] [blame]46
Prafulla Wadaskar62634642009-07-16 20:58:00 +0530[diff] [blame]47#endif /* _CONFIG_SHEEVAPLUG_H */