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Haavard Skinnemoenb62a4312007-04-14 17:11:49 +02001/*
2 * Copyright (C) 2006 Atmel Corporation
3 *
4 * Configuration settings for the AVR32 Network Gateway
5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02006 * SPDX-License-Identifier: GPL-2.0+
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +02007 */
8#ifndef __CONFIG_H
9#define __CONFIG_H
10
Andreas Bießmann94156fa2010-11-04 23:15:30 +000011#include <asm/arch/hardware.h>
Haavard Skinnemoen23f62f12008-05-19 11:36:28 +020012
Andreas Bießmann8a16a192011-04-18 04:12:35 +000013#define CONFIG_AT32AP
14#define CONFIG_AT32AP7000
15#define CONFIG_ATNGW100
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020016
Andreas Bießmann59f6b612015-05-23 23:09:15 +020017#define CONFIG_BOARD_EARLY_INIT_R
18
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020019/*
20 * Set up the PLL to run at 140 MHz, the CPU to run at the PLL
21 * frequency, the HSB and PBB busses to run at 1/2 the PLL frequency
22 * and the PBA bus to run at 1/4 the PLL frequency.
23 */
Andreas Bießmann8a16a192011-04-18 04:12:35 +000024#define CONFIG_PLL
25#define CONFIG_SYS_POWER_MANAGER
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020026#define CONFIG_SYS_OSC0_HZ 20000000
27#define CONFIG_SYS_PLL0_DIV 1
28#define CONFIG_SYS_PLL0_MUL 7
29#define CONFIG_SYS_PLL0_SUPPRESS_CYCLES 16
30#define CONFIG_SYS_CLKDIV_CPU 0
31#define CONFIG_SYS_CLKDIV_HSB 1
32#define CONFIG_SYS_CLKDIV_PBA 2
33#define CONFIG_SYS_CLKDIV_PBB 1
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020034
Haavard Skinnemoenc6f292f2010-08-12 13:52:54 +070035/* Reserve VM regions for SDRAM and NOR flash */
36#define CONFIG_SYS_NR_VM_REGIONS 2
37
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020038/*
39 * The PLLOPT register controls the PLL like this:
40 * icp = PLLOPT<2>
41 * ivco = PLLOPT<1:0>
42 *
43 * We want icp=1 (default) and ivco=0 (80-160 MHz) or ivco=2 (150-240MHz).
44 */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020045#define CONFIG_SYS_PLL0_OPT 0x04
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020046
Andreas Bießmann5807e792010-11-04 23:15:31 +000047#define CONFIG_USART_BASE ATMEL_BASE_USART1
48#define CONFIG_USART_ID 1
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020049/* User serviceable stuff */
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020050
Andreas Bießmann8a16a192011-04-18 04:12:35 +000051#define CONFIG_CMDLINE_TAG
52#define CONFIG_SETUP_MEMORY_TAGS
53#define CONFIG_INITRD_TAG
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020054
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020055#define CONFIG_BOOTARGS \
56 "console=ttyS0 root=/dev/mtdblock1 rootfstype=jffs2"
57#define CONFIG_BOOTCOMMAND \
58 "fsload; bootm"
59
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020060
61/*
62 * After booting the board for the first time, new ethernet addresses
63 * should be generated and assigned to the environment variables
64 * "ethaddr" and "eth1addr". This is normally done during production.
65 */
Andreas Bießmann8a16a192011-04-18 04:12:35 +000066#define CONFIG_OVERWRITE_ETHADDR_ONCE
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020067
68/*
69 * BOOTP/DHCP options
70 */
71#define CONFIG_BOOTP_SUBNETMASK
72#define CONFIG_BOOTP_GATEWAY
73
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020074/*
75 * Command line configuration.
76 */
David Brownell6ce352c2008-02-22 12:54:39 -080077
Andreas Bießmann8a16a192011-04-18 04:12:35 +000078#define CONFIG_ATMEL_USART
79#define CONFIG_MACB
80#define CONFIG_PORTMUX_PIO
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020081#define CONFIG_SYS_NR_PIOS 5
Andreas Bießmann8a16a192011-04-18 04:12:35 +000082#define CONFIG_SYS_HSDRAMC
Sven Schnelle8aa96822011-10-21 14:49:25 +020083#define CONFIG_GENERIC_ATMEL_MCI
Andreas Bießmann8a16a192011-04-18 04:12:35 +000084#define CONFIG_ATMEL_SPI
Haavard Skinnemoen14682842008-06-20 10:41:05 +020085
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020086#define CONFIG_SYS_DCACHE_LINESZ 32
87#define CONFIG_SYS_ICACHE_LINESZ 32
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020088
89#define CONFIG_NR_DRAM_BANKS 1
90
Andreas Bießmann8a16a192011-04-18 04:12:35 +000091#define CONFIG_SYS_FLASH_CFI
92#define CONFIG_FLASH_CFI_DRIVER
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020093
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020094#define CONFIG_SYS_FLASH_BASE 0x00000000
95#define CONFIG_SYS_FLASH_SIZE 0x800000
96#define CONFIG_SYS_MAX_FLASH_BANKS 1
97#define CONFIG_SYS_MAX_FLASH_SECT 135
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +020098
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +020099#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Andreas Bießmannf2c6d392011-04-18 04:12:43 +0000100#define CONFIG_SYS_TEXT_BASE 0x00000000
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200101
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200102#define CONFIG_SYS_INTRAM_BASE INTERNAL_SRAM_BASE
103#define CONFIG_SYS_INTRAM_SIZE INTERNAL_SRAM_SIZE
104#define CONFIG_SYS_SDRAM_BASE EBI_SDRAM_BASE
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200105
Andreas Bießmann8a16a192011-04-18 04:12:35 +0000106#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD7e1cda62008-09-10 22:48:06 +0200107#define CONFIG_ENV_SIZE 65536
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200108#define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_FLASH_SIZE - CONFIG_ENV_SIZE)
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200109
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200110#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INTRAM_BASE + CONFIG_SYS_INTRAM_SIZE)
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200111
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200112#define CONFIG_SYS_MALLOC_LEN (256*1024)
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200113
114/* Allow 4MB for the kernel run-time image */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200115#define CONFIG_SYS_LOAD_ADDR (EBI_SDRAM_BASE + 0x00400000)
116#define CONFIG_SYS_BOOTPARAMS_LEN (16 * 1024)
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200117
118/* Other configuration settings that shouldn't have to change all that often */
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200119#define CONFIG_SYS_CBSIZE 256
120#define CONFIG_SYS_MAXARGS 16
121#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
Andreas Bießmann8a16a192011-04-18 04:12:35 +0000122#define CONFIG_SYS_LONGHELP
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200123
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200124#define CONFIG_SYS_MEMTEST_START EBI_SDRAM_BASE
125#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x1f00000)
Haavard Skinnemoen6f08daf2007-11-22 16:51:39 +0100126
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200127#define CONFIG_SYS_BAUDRATE_TABLE { 115200, 38400, 19200, 9600, 2400 }
Haavard Skinnemoenb62a4312007-04-14 17:11:49 +0200128
129#endif /* __CONFIG_H */