blob: 0162955aae0535e24b4397835e585538304ab8d1 [file] [log] [blame]
Kever Yang6fc9ebf2018-12-20 11:33:42 +08001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Kever Yang7ae2d9f2017-11-28 16:04:21 +08002/*
3 * (C) Copyright 2017 Rockchip Electronics Co., Ltd.
Kever Yang7ae2d9f2017-11-28 16:04:21 +08004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Kever Yang7ae2d9f2017-11-28 16:04:21 +08009#include <ram.h>
10#include <syscon.h>
Kever Yang9fbe17c2019-03-28 11:01:23 +080011#include <asm/arch-rockchip/clock.h>
12#include <asm/arch-rockchip/grf_rk3128.h>
Kever Yange47db832019-11-15 11:04:33 +080013#include <asm/arch-rockchip/sdram.h>
Kever Yang7ae2d9f2017-11-28 16:04:21 +080014
Kever Yang7ae2d9f2017-11-28 16:04:21 +080015struct dram_info {
16 struct ram_info info;
17 struct rk3128_grf *grf;
18};
19
20static int rk3128_dmc_probe(struct udevice *dev)
21{
22 struct dram_info *priv = dev_get_priv(dev);
23
24 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
25 debug("%s: grf=%p\n", __func__, priv->grf);
26 priv->info.base = CONFIG_SYS_SDRAM_BASE;
27 priv->info.size = rockchip_sdram_size(
28 (phys_addr_t)&priv->grf->os_reg[1]);
29
30 return 0;
31}
32
33static int rk3128_dmc_get_info(struct udevice *dev, struct ram_info *info)
34{
35 struct dram_info *priv = dev_get_priv(dev);
36
37 *info = priv->info;
38
39 return 0;
40}
41
42static struct ram_ops rk3128_dmc_ops = {
43 .get_info = rk3128_dmc_get_info,
44};
45
46static const struct udevice_id rk3128_dmc_ids[] = {
47 { .compatible = "rockchip,rk3128-dmc" },
48 { }
49};
50
51U_BOOT_DRIVER(dmc_rk3128) = {
52 .name = "rockchip_rk3128_dmc",
53 .id = UCLASS_RAM,
54 .of_match = rk3128_dmc_ids,
55 .ops = &rk3128_dmc_ops,
56 .probe = rk3128_dmc_probe,
57 .priv_auto_alloc_size = sizeof(struct dram_info),
58};