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Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Thomas Abrahamd23cb312016-04-23 22:18:13 +05302/*
3 * Configuration settings for the Espresso7420 board.
4 * Copyright (C) 2016 Samsung Electronics
5 * Thomas Abraham <thomas.ab@samsung.com>
Thomas Abrahamd23cb312016-04-23 22:18:13 +05306 */
7
8#ifndef __CONFIG_EXYNOS7420_COMMON_H
9#define __CONFIG_EXYNOS7420_COMMON_H
10
11/* High Level Configuration Options */
12#define CONFIG_SAMSUNG /* in a SAMSUNG core */
Thomas Abrahamd23cb312016-04-23 22:18:13 +053013#define CONFIG_S5P
14
15#include <asm/arch/cpu.h> /* get chip and board defs */
16#include <linux/sizes.h>
17
Thomas Abrahamd23cb312016-04-23 22:18:13 +053018/* Miscellaneous configurable options */
Thomas Abrahamd23cb312016-04-23 22:18:13 +053019
Thomas Abrahamd23cb312016-04-23 22:18:13 +053020/* select serial console configuration */
Thomas Abrahamd23cb312016-04-23 22:18:13 +053021
Thomas Abrahamd23cb312016-04-23 22:18:13 +053022/* IRAM Layout */
23#define CONFIG_IRAM_BASE 0x02100000
24#define CONFIG_IRAM_SIZE 0x58000
25#define CONFIG_IRAM_END (CONFIG_IRAM_BASE + CONFIG_IRAM_SIZE)
Thomas Abrahamf1855fc2016-11-16 18:49:16 +053026#define CPU_RELEASE_ADDR secondary_boot_addr
Thomas Abrahamd23cb312016-04-23 22:18:13 +053027
Thomas Abrahamd23cb312016-04-23 22:18:13 +053028/* select serial console configuration */
Thomas Abrahamd23cb312016-04-23 22:18:13 +053029
Thomas Abrahamd23cb312016-04-23 22:18:13 +053030#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
31#define PHYS_SDRAM_1_SIZE SDRAM_BANK_SIZE
32#define PHYS_SDRAM_2 (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
33#define PHYS_SDRAM_2_SIZE SDRAM_BANK_SIZE
34#define PHYS_SDRAM_3 (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
35#define PHYS_SDRAM_3_SIZE SDRAM_BANK_SIZE
36#define PHYS_SDRAM_4 (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
37#define PHYS_SDRAM_4_SIZE SDRAM_BANK_SIZE
38#define PHYS_SDRAM_5 (CONFIG_SYS_SDRAM_BASE + (4 * SDRAM_BANK_SIZE))
39#define PHYS_SDRAM_5_SIZE SDRAM_BANK_SIZE
40#define PHYS_SDRAM_6 (CONFIG_SYS_SDRAM_BASE + (5 * SDRAM_BANK_SIZE))
41#define PHYS_SDRAM_6_SIZE SDRAM_BANK_SIZE
42#define PHYS_SDRAM_7 (CONFIG_SYS_SDRAM_BASE + (6 * SDRAM_BANK_SIZE))
43#define PHYS_SDRAM_7_SIZE SDRAM_BANK_SIZE
44#define PHYS_SDRAM_8 (CONFIG_SYS_SDRAM_BASE + (7 * SDRAM_BANK_SIZE))
45#define PHYS_SDRAM_8_SIZE SDRAM_BANK_SIZE
46
47/* Configuration of ENV Blocks */
Thomas Abrahamd23cb312016-04-23 22:18:13 +053048
49#define BOOT_TARGET_DEVICES(func) \
50 func(MMC, mmc, 1) \
51 func(MMC, mmc, 0) \
52
53#ifndef MEM_LAYOUT_ENV_SETTINGS
54#define MEM_LAYOUT_ENV_SETTINGS \
55 "bootm_size=0x10000000\0" \
56 "kernel_addr_r=0x42000000\0" \
57 "fdt_addr_r=0x43000000\0" \
58 "ramdisk_addr_r=0x43300000\0" \
59 "scriptaddr=0x50000000\0" \
60 "pxefile_addr_r=0x51000000\0"
61#endif
62
63#ifndef EXYNOS_DEVICE_SETTINGS
64#define EXYNOS_DEVICE_SETTINGS \
65 "stdin=serial\0" \
66 "stdout=serial\0" \
67 "stderr=serial\0"
68#endif
69
70#ifndef EXYNOS_FDTFILE_SETTING
71#define EXYNOS_FDTFILE_SETTING
72#endif
73
74#define CONFIG_EXTRA_ENV_SETTINGS \
75 EXYNOS_DEVICE_SETTINGS \
76 EXYNOS_FDTFILE_SETTING \
77 MEM_LAYOUT_ENV_SETTINGS
78
79#endif /* __CONFIG_EXYNOS7420_COMMON_H */