blob: 25b6e7005e7aebe4a68881424477220d597df398 [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +09002/*
3 * include/configs/blanche.h
4 * This file is blanche board configuration.
5 *
6 * Copyright (C) 2016 Renesas Electronics Corporation
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +09007 */
8
9#ifndef __BLANCHE_H
10#define __BLANCHE_H
11
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090012#include "rcar-gen2-common.h"
13
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090014/* STACK */
Marek Vasut927b1e32018-04-30 14:10:36 +020015#define STACK_AREA_SIZE 0x00100000
16#define LOW_LEVEL_MERAM_STACK \
Tom Rini4ddbade2022-05-25 12:16:03 -040017 (SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090018
19/* MEMORY */
20#define RCAR_GEN2_SDRAM_BASE 0x40000000
21#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
22#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
23
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090024#undef CONFIG_SYS_LOADS_BAUD_CHANGE
25
26/* FLASH */
Masahiro Yamada8cea9b52017-02-11 22:43:54 +090027#if !defined(CONFIG_MTD_NOR_FLASH)
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090028#define CONFIG_SH_QSPI_BASE 0xE6B10000
29#else
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090030#define CONFIG_FLASH_SHOW_PROGRESS 45
31#define CONFIG_SYS_FLASH_BASE 0x00000000
32#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MB */
33#define CONFIG_SYS_MAX_FLASH_SECT 1024
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090034#define CONFIG_SYS_FLASH_BANKS_LIST { (CONFIG_SYS_FLASH_BASE) }
35#define CONFIG_SYS_FLASH_BANKS_SIZES { (CONFIG_SYS_FLASH_SIZE) }
36
37#define CONFIG_SYS_FLASH_ERASE_TOUT 3000
38#define CONFIG_SYS_FLASH_WRITE_TOUT 3000
39#define CONFIG_SYS_FLASH_LOCK_TOUT 3000
40#define CONFIG_SYS_FLASH_UNLOCK_TOUT 3000
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090041#endif
42
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090043/* Board Clock */
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090044
45/* ENV setting */
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090046
masakazu.mochizuki.wd@hitachi.com9d0e9372016-04-12 17:11:41 +090047#endif /* __BLANCHE_H */