| Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2011 |
| 4 | * Marvell Semiconductor <www.marvell.com> |
| 5 | * Written-by: Lei Wen <leiwen@marvell.com> |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | /* |
| 9 | * This file should be included in board config header file. |
| 10 | * |
| Stefan Roese | 7cd3484 | 2015-04-25 06:29:49 +0200 | [diff] [blame] | 11 | * It supports common definitions for MVEBU platforms |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 12 | */ |
| 13 | |
| Stefan Roese | ebda3ec | 2015-04-25 06:29:47 +0200 | [diff] [blame] | 14 | #ifndef _MVEBU_CONFIG_H |
| 15 | #define _MVEBU_CONFIG_H |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 16 | |
| 17 | #include <asm/arch/soc.h> |
| 18 | |
| Stefan Roese | 479f9af | 2016-02-10 07:23:00 +0100 | [diff] [blame] | 19 | #if defined(CONFIG_ARMADA_XP) || defined(CONFIG_ARMADA_375) \ |
| Chris Packham | a8f845e | 2019-04-11 22:22:50 +1200 | [diff] [blame] | 20 | || defined(CONFIG_ARMADA_38X) || defined(CONFIG_ARMADA_MSYS) |
| Stefan Roese | eb083e5 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 21 | /* |
| 22 | * Set this for the common xor register definitions needed in dram.c |
| 23 | * for A38x as well here. |
| 24 | */ |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 25 | #define MV88F78X60 /* for the DDR training bin_hdr code */ |
| Stefan Roese | 7cd3484 | 2015-04-25 06:29:49 +0200 | [diff] [blame] | 26 | #endif |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 27 | |
| Stefan Roese | c14c93f | 2015-11-18 12:44:29 +0100 | [diff] [blame] | 28 | #define CONFIG_SYS_L2_PL310 |
| 29 | |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 30 | #define MV_UART_CONSOLE_BASE MVEBU_UART0_BASE |
| 31 | |
| Stefan Roese | 49e7d77 | 2015-11-20 13:51:57 +0100 | [diff] [blame] | 32 | /* Needed for SPI NOR booting in SPL */ |
| 33 | #define CONFIG_DM_SEQ_ALIAS 1 |
| 34 | |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 35 | /* |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 36 | * I2C related stuff |
| 37 | */ |
| 38 | #ifdef CONFIG_CMD_I2C |
| 39 | #ifndef CONFIG_SYS_I2C_SOFT |
| 40 | #define CONFIG_I2C_MVTWSI |
| 41 | #endif |
| Stefan Roese | 93e6bf4 | 2014-10-22 12:13:17 +0200 | [diff] [blame] | 42 | #endif |
| 43 | |
| Stefan Roese | 6417489 | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 44 | /* Use common timer */ |
| 45 | #define CONFIG_SYS_TIMER_COUNTS_DOWN |
| 46 | #define CONFIG_SYS_TIMER_COUNTER (MVEBU_TIMER_BASE + 0x14) |
| 47 | #define CONFIG_SYS_TIMER_RATE 25000000 |
| 48 | |
| Stefan Roese | ebda3ec | 2015-04-25 06:29:47 +0200 | [diff] [blame] | 49 | #endif /* __MVEBU_CONFIG_H */ |