blob: 707735cf85161240847b4702694e0a6dd73ef94a [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warren402a0fa2016-08-08 11:28:26 -06002/*
3 * Copyright (c) 2016, NVIDIA CORPORATION.
Stephen Warren402a0fa2016-08-08 11:28:26 -06004 */
5
6#include <common.h>
7#include <dm.h>
Simon Glass0f2af882020-05-10 11:40:05 -06008#include <log.h>
Simon Glass9bc15642020-02-03 07:36:16 -07009#include <malloc.h>
Stephen Warren402a0fa2016-08-08 11:28:26 -060010#include <misc.h>
11#include <power-domain-uclass.h>
12#include <asm/arch-tegra/bpmp_abi.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -060013#include <linux/bitops.h>
Stephen Warren402a0fa2016-08-08 11:28:26 -060014
15#define UPDATE BIT(0)
16#define ON BIT(1)
17
18static int tegra186_power_domain_request(struct power_domain *power_domain)
19{
20 debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
21 power_domain, power_domain->dev, power_domain->id);
22
23 return 0;
24}
25
26static int tegra186_power_domain_free(struct power_domain *power_domain)
27{
28 debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
29 power_domain, power_domain->dev, power_domain->id);
30
31 return 0;
32}
33
34static int tegra186_power_domain_common(struct power_domain *power_domain,
35 bool on)
36{
37 struct mrq_pg_update_state_request req;
38 int on_state = on ? ON : 0;
39 int ret;
40
41 req.partition_id = power_domain->id;
42 req.logic_state = UPDATE | on_state;
43 req.sram_state = UPDATE | on_state;
44 /*
45 * Drivers manage their own clocks so they don't get out of sync, and
46 * since some power domains have many clocks, only a subset of which
47 * are actually needed depending on use-case.
48 */
49 req.clock_state = UPDATE;
50
51 ret = misc_call(power_domain->dev->parent, MRQ_PG_UPDATE_STATE, &req,
52 sizeof(req), NULL, 0);
53 if (ret < 0)
54 return ret;
55
56 return 0;
57}
58
59static int tegra186_power_domain_on(struct power_domain *power_domain)
60{
61 debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
62 power_domain, power_domain->dev, power_domain->id);
63
64 return tegra186_power_domain_common(power_domain, true);
65}
66
67static int tegra186_power_domain_off(struct power_domain *power_domain)
68{
69 debug("%s(power_domain=%p) (dev=%p, id=%lu)\n", __func__,
70 power_domain, power_domain->dev, power_domain->id);
71
72 return tegra186_power_domain_common(power_domain, false);
73}
74
75struct power_domain_ops tegra186_power_domain_ops = {
76 .request = tegra186_power_domain_request,
Simon Glass92ed3a32020-02-03 07:35:51 -070077 .rfree = tegra186_power_domain_free,
Stephen Warren402a0fa2016-08-08 11:28:26 -060078 .on = tegra186_power_domain_on,
79 .off = tegra186_power_domain_off,
80};
81
82static int tegra186_power_domain_probe(struct udevice *dev)
83{
84 debug("%s(dev=%p)\n", __func__, dev);
85
86 return 0;
87}
88
89U_BOOT_DRIVER(tegra186_power_domain) = {
90 .name = "tegra186_power_domain",
91 .id = UCLASS_POWER_DOMAIN,
92 .probe = tegra186_power_domain_probe,
93 .ops = &tegra186_power_domain_ops,
94};