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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Peter Tyser1c2b3292008-12-17 16:36:23 -06002/*
3 * Copyright 2008 Extreme Engineering Solutions, Inc.
4 * Copyright 2007-2008 Freescale Semiconductor, Inc.
Peter Tyser1c2b3292008-12-17 16:36:23 -06005 */
6
7#include <common.h>
Simon Glass18afe102019-11-14 12:57:47 -07008#include <init.h>
Peter Tyser1c2b3292008-12-17 16:36:23 -06009#include <pci.h>
Kumar Gala9bbd6432009-04-02 13:22:48 -050010#include <asm/fsl_pci.h>
Kumar Gala3d020382010-12-15 04:55:20 -060011#include <asm/fsl_serdes.h>
Peter Tyser2b1a48d2009-08-07 13:16:34 -050012#include <asm/io.h>
Peter Tyser51944772010-10-22 00:20:22 -050013#include <linux/compiler.h>
Masahiro Yamada75f82d02018-03-05 01:20:11 +090014#include <linux/libfdt.h>
Peter Tyser1c2b3292008-12-17 16:36:23 -060015#include <fdt_support.h>
16
Peter Tyser1c2b3292008-12-17 16:36:23 -060017
Peter Tyser59b5fdf2008-12-01 13:47:13 -060018#ifdef CONFIG_PCI1
19static struct pci_controller pci1_hose;
20#endif
Peter Tyser75379822009-05-22 10:26:35 -050021
Peter Tyser1c2b3292008-12-17 16:36:23 -060022void pci_init_board(void)
23{
Peter Tyser51944772010-10-22 00:20:22 -050024 int first_free_busno = 0;
Peter Tyser51944772010-10-22 00:20:22 -050025
Kumar Galaf330c6b2010-12-17 10:23:03 -060026#ifdef CONFIG_PCI1
27 int pcie_ep;
28 struct fsl_pci_info pci_info;
Peter Tyser1c2b3292008-12-17 16:36:23 -060029 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Peter Tyser51944772010-10-22 00:20:22 -050030 u32 devdisr = in_be32(&gur->devdisr);
Peter Tyser2b1a48d2009-08-07 13:16:34 -050031 uint pci_spd_norm = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_SPD;
32 uint pci_32 = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_PCI32;
33 uint pci_arb = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1_ARB;
34 uint pcix = in_be32(&gur->pordevsr) & MPC85xx_PORDEVSR_PCI1;
Peter Tyser59b5fdf2008-12-01 13:47:13 -060035 uint freq = CONFIG_SYS_CLK_FREQ / 1000 / 1000;
36
Peter Tyser59b5fdf2008-12-01 13:47:13 -060037 if (!(devdisr & MPC85xx_DEVDISR_PCI1)) {
Kumar Galaf330c6b2010-12-17 10:23:03 -060038 SET_STD_PCI_INFO(pci_info, 1);
39 set_next_law(pci_info.mem_phys,
40 law_size_bits(pci_info.mem_size), pci_info.law);
41 set_next_law(pci_info.io_phys,
42 law_size_bits(pci_info.io_size), pci_info.law);
43
44 pcie_ep = fsl_setup_hose(&pci1_hose, pci_info.regs);
Peter Tyser2b91f712010-10-29 17:59:24 -050045 printf("PCI1: %d bit %s, %s %d MHz, %s, %s\n",
Peter Tyser59b5fdf2008-12-01 13:47:13 -060046 pci_32 ? 32 : 64,
47 pcix ? "PCIX" : "PCI",
Peter Tyser2b1a48d2009-08-07 13:16:34 -050048 pci_spd_norm ? ">=" : "<=",
Peter Tyser59b5fdf2008-12-01 13:47:13 -060049 pcix ? freq * 2 : freq,
Peter Tyser51944772010-10-22 00:20:22 -050050 pcie_ep ? "agent" : "host",
Peter Tyser59b5fdf2008-12-01 13:47:13 -060051 pci_arb ? "arbiter" : "external-arbiter");
52
Kumar Galaf330c6b2010-12-17 10:23:03 -060053 first_free_busno = fsl_pci_init_port(&pci_info,
Peter Tyser51944772010-10-22 00:20:22 -050054 &pci1_hose, first_free_busno);
Peter Tyser59b5fdf2008-12-01 13:47:13 -060055 } else {
Peter Tyser2b91f712010-10-29 17:59:24 -050056 printf("PCI1: disabled\n");
Peter Tyser59b5fdf2008-12-01 13:47:13 -060057 }
York Sunefc49e02016-11-15 13:52:34 -080058#elif defined CONFIG_ARCH_MPC8548
Kumar Galaf330c6b2010-12-17 10:23:03 -060059 volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
Peter Tyser59b5fdf2008-12-01 13:47:13 -060060 /* PCI1 not present on MPC8572 */
Peter Tyser2b1a48d2009-08-07 13:16:34 -050061 setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_PCI1);
Peter Tyser59b5fdf2008-12-01 13:47:13 -060062#endif
Peter Tyser1c2b3292008-12-17 16:36:23 -060063
Kumar Galaf330c6b2010-12-17 10:23:03 -060064 fsl_pcie_init_board(first_free_busno);
Peter Tyser1c2b3292008-12-17 16:36:23 -060065}
66
67#if defined(CONFIG_OF_BOARD_SETUP)
Peter Tyser1c2b3292008-12-17 16:36:23 -060068void ft_board_pci_setup(void *blob, bd_t *bd)
69{
Kumar Galad0f27d32010-07-08 22:37:44 -050070 FT_FSL_PCI_SETUP;
Peter Tyser1c2b3292008-12-17 16:36:23 -060071}
72#endif /* CONFIG_OF_BOARD_SETUP */