| Paul Burton | 96c6847 | 2018-12-16 19:25:22 -0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
| 3 | #include <config.h> |
| 4 | #include <common.h> |
| 5 | #include <asm/io.h> |
| Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame^] | 6 | #include <linux/bitops.h> |
| Paul Burton | 96c6847 | 2018-12-16 19:25:22 -0300 | [diff] [blame] | 7 | #include <mach/jz4780.h> |
| 8 | |
| 9 | int jz47xx_gpio_get_value(unsigned int gpio) |
| 10 | { |
| 11 | void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; |
| 12 | int port = gpio / 32; |
| 13 | int pin = gpio % 32; |
| 14 | |
| 15 | return readl(gpio_regs + GPIO_PXPIN(port)) & BIT(pin); |
| 16 | } |
| 17 | |
| 18 | void jz47xx_gpio_direction_input(unsigned int gpio) |
| 19 | { |
| 20 | void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; |
| 21 | int port = gpio / 32; |
| 22 | int pin = gpio % 32; |
| 23 | |
| 24 | writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); |
| 25 | writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port)); |
| 26 | writel(BIT(pin), gpio_regs + GPIO_PXPAT1S(port)); |
| 27 | } |
| 28 | |
| 29 | void jz47xx_gpio_direction_output(unsigned int gpio, int value) |
| 30 | { |
| 31 | void __iomem *gpio_regs = (void __iomem *)GPIO_BASE; |
| 32 | int port = gpio / 32; |
| 33 | int pin = gpio % 32; |
| 34 | |
| 35 | writel(BIT(pin), gpio_regs + GPIO_PXINTC(port)); |
| 36 | writel(BIT(pin), gpio_regs + GPIO_PXMASKS(port)); |
| 37 | writel(BIT(pin), gpio_regs + GPIO_PXPAT1C(port)); |
| 38 | writel(BIT(pin), gpio_regs + |
| 39 | (value ? GPIO_PXPAT0S(port) : GPIO_PXPAT0C(port))); |
| 40 | } |