blob: 67e9234066b03151ecdf41eea0392fbedc4b4eaa [file] [log] [blame]
Marc Zyngier09659d92014-07-12 14:24:04 +01001/*
2 * Copyright (C) 2013 - ARM Ltd
3 * Author: Marc Zyngier <marc.zyngier@arm.com>
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program. If not, see <http://www.gnu.org/licenses/>.
16 */
17
18#ifndef __ARM_PSCI_H__
19#define __ARM_PSCI_H__
20
Simon Glass1e268642020-05-10 11:39:55 -060021#ifndef __ASSEMBLY__
22#include <linux/bitops.h>
23#endif
24
Hou Zhiqiang25f68612016-07-29 18:26:36 +080025#define ARM_PSCI_VER_1_0 (0x00010000)
26#define ARM_PSCI_VER_0_2 (0x00000002)
27
Beniamino Galvanib8845e12016-05-08 08:30:14 +020028/* PSCI 0.1 interface */
Marc Zyngier09659d92014-07-12 14:24:04 +010029#define ARM_PSCI_FN_BASE 0x95c1ba5e
30#define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n))
31
32#define ARM_PSCI_FN_CPU_SUSPEND ARM_PSCI_FN(0)
33#define ARM_PSCI_FN_CPU_OFF ARM_PSCI_FN(1)
34#define ARM_PSCI_FN_CPU_ON ARM_PSCI_FN(2)
35#define ARM_PSCI_FN_MIGRATE ARM_PSCI_FN(3)
36
37#define ARM_PSCI_RET_SUCCESS 0
38#define ARM_PSCI_RET_NI (-1)
39#define ARM_PSCI_RET_INVAL (-2)
40#define ARM_PSCI_RET_DENIED (-3)
Hongbo Zhangce603222016-07-21 18:09:36 +080041#define ARM_PSCI_RET_ALREADY_ON (-4)
42#define ARM_PSCI_RET_ON_PENDING (-5)
43#define ARM_PSCI_RET_INTERNAL_FAILURE (-6)
44#define ARM_PSCI_RET_NOT_PRESENT (-7)
45#define ARM_PSCI_RET_DISABLED (-8)
46#define ARM_PSCI_RET_INVALID_ADDRESS (-9)
Marc Zyngier09659d92014-07-12 14:24:04 +010047
Beniamino Galvanib8845e12016-05-08 08:30:14 +020048/* PSCI 0.2 interface */
49#define ARM_PSCI_0_2_FN_BASE 0x84000000
50#define ARM_PSCI_0_2_FN(n) (ARM_PSCI_0_2_FN_BASE + (n))
51
macro.wave.z@gmail.com6a66c9b2016-12-08 11:58:24 +080052#define ARM_PSCI_0_2_FN64_BASE 0xC4000000
53#define ARM_PSCI_0_2_FN64(n) (ARM_PSCI_0_2_FN64_BASE + (n))
54
Beniamino Galvanib8845e12016-05-08 08:30:14 +020055#define ARM_PSCI_0_2_FN_PSCI_VERSION ARM_PSCI_0_2_FN(0)
56#define ARM_PSCI_0_2_FN_CPU_SUSPEND ARM_PSCI_0_2_FN(1)
57#define ARM_PSCI_0_2_FN_CPU_OFF ARM_PSCI_0_2_FN(2)
58#define ARM_PSCI_0_2_FN_CPU_ON ARM_PSCI_0_2_FN(3)
59#define ARM_PSCI_0_2_FN_AFFINITY_INFO ARM_PSCI_0_2_FN(4)
60#define ARM_PSCI_0_2_FN_MIGRATE ARM_PSCI_0_2_FN(5)
61#define ARM_PSCI_0_2_FN_MIGRATE_INFO_TYPE ARM_PSCI_0_2_FN(6)
62#define ARM_PSCI_0_2_FN_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN(7)
63#define ARM_PSCI_0_2_FN_SYSTEM_OFF ARM_PSCI_0_2_FN(8)
64#define ARM_PSCI_0_2_FN_SYSTEM_RESET ARM_PSCI_0_2_FN(9)
65
macro.wave.z@gmail.com6a66c9b2016-12-08 11:58:24 +080066#define ARM_PSCI_0_2_FN64_CPU_SUSPEND ARM_PSCI_0_2_FN64(1)
67#define ARM_PSCI_0_2_FN64_CPU_ON ARM_PSCI_0_2_FN64(3)
68#define ARM_PSCI_0_2_FN64_AFFINITY_INFO ARM_PSCI_0_2_FN64(4)
69#define ARM_PSCI_0_2_FN64_MIGRATE ARM_PSCI_0_2_FN64(5)
70#define ARM_PSCI_0_2_FN64_MIGRATE_INFO_UP_CPU ARM_PSCI_0_2_FN64(7)
Rajesh Ravi45bbe712019-11-22 14:50:01 -080071#define ARM_PSCI_0_2_FN64_SYSTEM_RESET2 ARM_PSCI_0_2_FN64(18)
macro.wave.z@gmail.com6a66c9b2016-12-08 11:58:24 +080072
Hongbo Zhangce603222016-07-21 18:09:36 +080073/* PSCI 1.0 interface */
74#define ARM_PSCI_1_0_FN_PSCI_FEATURES ARM_PSCI_0_2_FN(10)
75#define ARM_PSCI_1_0_FN_CPU_FREEZE ARM_PSCI_0_2_FN(11)
76#define ARM_PSCI_1_0_FN_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN(12)
77#define ARM_PSCI_1_0_FN_NODE_HW_STATE ARM_PSCI_0_2_FN(13)
78#define ARM_PSCI_1_0_FN_SYSTEM_SUSPEND ARM_PSCI_0_2_FN(14)
79#define ARM_PSCI_1_0_FN_SET_SUSPEND_MODE ARM_PSCI_0_2_FN(15)
80#define ARM_PSCI_1_0_FN_STAT_RESIDENCY ARM_PSCI_0_2_FN(16)
81#define ARM_PSCI_1_0_FN_STAT_COUNT ARM_PSCI_0_2_FN(17)
82
macro.wave.z@gmail.com6a66c9b2016-12-08 11:58:24 +080083#define ARM_PSCI_1_0_FN64_CPU_DEFAULT_SUSPEND ARM_PSCI_0_2_FN64(12)
84#define ARM_PSCI_1_0_FN64_NODE_HW_STATE ARM_PSCI_0_2_FN64(13)
85#define ARM_PSCI_1_0_FN64_SYSTEM_SUSPEND ARM_PSCI_0_2_FN64(14)
86#define ARM_PSCI_1_0_FN64_STAT_RESIDENCY ARM_PSCI_0_2_FN64(16)
87#define ARM_PSCI_1_0_FN64_STAT_COUNT ARM_PSCI_0_2_FN64(17)
88
Chen-Yu Tsaia00f85d2016-06-19 12:38:36 +080089/* 1KB stack per core */
90#define ARM_PSCI_STACK_SHIFT 10
91#define ARM_PSCI_STACK_SIZE (1 << ARM_PSCI_STACK_SHIFT)
92
Hongbo Zhang08f6ac82016-07-21 18:09:37 +080093/* PSCI affinity level state returned by AFFINITY_INFO */
94#define PSCI_AFFINITY_LEVEL_ON 0
95#define PSCI_AFFINITY_LEVEL_OFF 1
96#define PSCI_AFFINITY_LEVEL_ON_PENDING 2
97
Rajesh Ravi45bbe712019-11-22 14:50:01 -080098#define PSCI_RESET2_TYPE_VENDOR_SHIFT 31
99#define PSCI_RESET2_TYPE_VENDOR BIT(PSCI_RESET2_TYPE_VENDOR_SHIFT)
100
Tom Rinifb02cc12015-03-05 20:19:36 -0500101#ifndef __ASSEMBLY__
Chen-Yu Tsai23addd22016-06-07 10:54:26 +0800102#include <asm/types.h>
Simon Glass4dcacfc2020-05-10 11:40:13 -0600103#include <linux/bitops.h>
Chen-Yu Tsai23addd22016-06-07 10:54:26 +0800104
Patrick Delaunay11692bc2018-04-16 10:15:12 +0200105/* These 3 helper functions assume cpu < CONFIG_ARMV7_PSCI_NR_CPUS */
Chen-Yu Tsaiae7947c2016-07-05 21:45:07 +0800106u32 psci_get_target_pc(int cpu);
Patrick Delaunayfeb73eb2018-04-16 10:13:22 +0200107u32 psci_get_context_id(int cpu);
Patrick Delaunayfeb73eb2018-04-16 10:13:22 +0200108void psci_save(int cpu, u32 pc, u32 context_id);
Chen-Yu Tsaiae7947c2016-07-05 21:45:07 +0800109
Chen-Yu Tsai23addd22016-06-07 10:54:26 +0800110void psci_cpu_entry(void);
111u32 psci_get_cpu_id(void);
Chen-Yu Tsai23addd22016-06-07 10:54:26 +0800112void psci_cpu_off_common(void);
113
Tom Rinifb02cc12015-03-05 20:19:36 -0500114int psci_update_dt(void *fdt);
Jan Kiszka6e67b1b2015-04-21 07:18:34 +0200115void psci_board_init(void);
Hou Zhiqiangdae02772016-06-28 20:18:16 +0800116int fdt_psci(void *fdt);
Hongbo Zhangacd3d332016-08-19 17:20:30 +0800117
118void psci_v7_flush_dcache_all(void);
Tom Rinifb02cc12015-03-05 20:19:36 -0500119#endif /* ! __ASSEMBLY__ */
120
Marc Zyngier09659d92014-07-12 14:24:04 +0100121#endif /* __ARM_PSCI_H__ */