| Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * (C) Copyright 2019 Linaro |
| 4 | * Author: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __HI3660_H__ |
| 8 | #define __HI3660_H__ |
| 9 | |
| Simon Glass | 4dcacfc | 2020-05-10 11:40:13 -0600 | [diff] [blame^] | 10 | #ifndef __ASSEMBLY__ |
| 11 | #include <linux/bitops.h> |
| 12 | #endif |
| 13 | |
| Manivannan Sadhasivam | cf33f92 | 2019-08-02 20:40:09 +0530 | [diff] [blame] | 14 | #define HI3660_UART6_BASE 0xfff32000 |
| 15 | |
| 16 | #define PMU_REG_BASE 0xfff34000 |
| 17 | #define PMIC_HARDWARE_CTRL0 (PMU_REG_BASE + (0x0C5 << 2)) |
| 18 | |
| 19 | #define SCTRL_REG_BASE 0xfff0a000 |
| 20 | #define SCTRL_SCFPLLCTRL0 (SCTRL_REG_BASE + 0x120) |
| 21 | #define SCTRL_SCFPLLCTRL0_FPLL0_EN BIT(0) |
| 22 | |
| 23 | #define CRG_REG_BASE 0xfff35000 |
| 24 | #define CRG_PEREN2 (CRG_REG_BASE + 0x020) |
| 25 | #define CRG_PERDIS2 (CRG_REG_BASE + 0x024) |
| 26 | #define CRG_PERCLKEN2 (CRG_REG_BASE + 0x028) |
| 27 | #define CRG_PERSTAT2 (CRG_REG_BASE + 0x02C) |
| 28 | #define CRG_PEREN4 (CRG_REG_BASE + 0x040) |
| 29 | #define CRG_PERDIS4 (CRG_REG_BASE + 0x044) |
| 30 | #define CRG_PERCLKEN4 (CRG_REG_BASE + 0x048) |
| 31 | #define CRG_PERSTAT4 (CRG_REG_BASE + 0x04C) |
| 32 | #define CRG_PERRSTEN2 (CRG_REG_BASE + 0x078) |
| 33 | #define CRG_PERRSTDIS2 (CRG_REG_BASE + 0x07C) |
| 34 | #define CRG_PERRSTSTAT2 (CRG_REG_BASE + 0x080) |
| 35 | #define CRG_PERRSTEN3 (CRG_REG_BASE + 0x084) |
| 36 | #define CRG_PERRSTDIS3 (CRG_REG_BASE + 0x088) |
| 37 | #define CRG_PERRSTSTAT3 (CRG_REG_BASE + 0x08C) |
| 38 | #define CRG_PERRSTEN4 (CRG_REG_BASE + 0x090) |
| 39 | #define CRG_PERRSTDIS4 (CRG_REG_BASE + 0x094) |
| 40 | #define CRG_PERRSTSTAT4 (CRG_REG_BASE + 0x098) |
| 41 | #define CRG_ISOEN (CRG_REG_BASE + 0x144) |
| 42 | #define CRG_ISODIS (CRG_REG_BASE + 0x148) |
| 43 | #define CRG_ISOSTAT (CRG_REG_BASE + 0x14C) |
| 44 | |
| 45 | #define PINMUX4_BASE 0xfff11000 |
| 46 | #define PINMUX4_SDDET (PINMUX4_BASE + 0x60) |
| 47 | |
| 48 | #define PINCONF3_BASE 0xff37e800 |
| 49 | #define PINCONF3_SDCLK (PINCONF3_BASE + 0x00) |
| 50 | #define PINCONF3_SDCMD (PINCONF3_BASE + 0x04) |
| 51 | #define PINCONF3_SDDATA0 (PINCONF3_BASE + 0x08) |
| 52 | #define PINCONF3_SDDATA1 (PINCONF3_BASE + 0x0c) |
| 53 | #define PINCONF3_SDDATA2 (PINCONF3_BASE + 0x10) |
| 54 | #define PINCONF3_SDDATA3 (PINCONF3_BASE + 0x14) |
| 55 | |
| 56 | #endif /*__HI3660_H__*/ |