Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) 2014 Eukréa Electromatique |
| 4 | * Author: Eric Bénard <eric@eukrea.com> |
| 5 | * Fabio Estevam <fabio.estevam@freescale.com> |
| 6 | * Jon Nettleton <jon.nettleton@gmail.com> |
| 7 | * |
| 8 | * based on sabresd.c which is : |
| 9 | * Copyright (C) 2012 Freescale Semiconductor, Inc. |
| 10 | * and on hummingboard.c which is : |
| 11 | * Copyright (C) 2013 SolidRun ltd. |
| 12 | * Copyright (C) 2013 Jon Nettleton <jon.nettleton@gmail.com>. |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 13 | */ |
| 14 | |
Simon Glass | a7b5130 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 15 | #include <init.h> |
Simon Glass | 274e0b0 | 2020-05-10 11:39:56 -0600 | [diff] [blame] | 16 | #include <net.h> |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 17 | #include <asm/arch/clock.h> |
| 18 | #include <asm/arch/sys_proto.h> |
| 19 | #include <asm/arch/imx-regs.h> |
| 20 | #include <asm/arch/iomux.h> |
| 21 | #include <asm/arch/mx6-pins.h> |
Simon Glass | 3ba929a | 2020-10-30 21:38:53 -0600 | [diff] [blame] | 22 | #include <asm/global_data.h> |
Simon Glass | dbd7954 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 23 | #include <linux/delay.h> |
Masahiro Yamada | 56a931c | 2016-09-21 11:28:55 +0900 | [diff] [blame] | 24 | #include <linux/errno.h> |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 25 | #include <asm/gpio.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 26 | #include <asm/mach-imx/iomux-v3.h> |
| 27 | #include <asm/mach-imx/boot_mode.h> |
Stefano Babic | 33731bc | 2017-06-29 10:16:06 +0200 | [diff] [blame] | 28 | #include <asm/mach-imx/spi.h> |
| 29 | #include <asm/mach-imx/video.h> |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 30 | #include <i2c.h> |
Diego Dorta | 2661c9c | 2017-09-22 12:12:18 -0300 | [diff] [blame] | 31 | #include <input.h> |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 32 | #include <miiphy.h> |
| 33 | #include <netdev.h> |
| 34 | #include <asm/arch/mxc_hdmi.h> |
| 35 | #include <asm/arch/crm_regs.h> |
| 36 | #include <linux/fb.h> |
| 37 | #include <ipu_pixfmt.h> |
| 38 | #include <asm/io.h> |
Lukasz Majewski | add9573 | 2017-11-07 11:10:29 +0100 | [diff] [blame] | 39 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 40 | DECLARE_GLOBAL_DATA_PTR; |
| 41 | |
| 42 | #define UART_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| 43 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \ |
| 44 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 45 | |
| 46 | #define USDHC_PAD_CTRL (PAD_CTL_PUS_47K_UP | \ |
| 47 | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \ |
| 48 | PAD_CTL_SRE_FAST | PAD_CTL_HYS) |
| 49 | |
| 50 | #define USDHC_PAD_CLK_CTRL (PAD_CTL_SPEED_LOW | \ |
| 51 | PAD_CTL_DSE_80ohm | PAD_CTL_SRE_FAST | \ |
| 52 | PAD_CTL_HYS) |
| 53 | |
| 54 | #define ENET_PAD_CTRL (PAD_CTL_PUS_100K_UP | \ |
| 55 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 56 | |
| 57 | #define ENET_PAD_CTRL_PD (PAD_CTL_PUS_100K_DOWN | \ |
| 58 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_HYS) |
| 59 | |
| 60 | #define ENET_PAD_CTRL_CLK ((PAD_CTL_PUS_100K_UP & ~PAD_CTL_PKE) | \ |
| 61 | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) |
| 62 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 63 | #define SPI_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_SPEED_MED | \ |
| 64 | PAD_CTL_DSE_40ohm | PAD_CTL_SRE_FAST) |
| 65 | |
| 66 | static int board_type = -1; |
| 67 | #define BOARD_IS_MARSBOARD 0 |
| 68 | #define BOARD_IS_RIOTBOARD 1 |
| 69 | |
| 70 | int dram_init(void) |
| 71 | { |
| 72 | gd->ram_size = get_ram_size((void *)PHYS_SDRAM, PHYS_SDRAM_SIZE); |
| 73 | |
| 74 | return 0; |
| 75 | } |
| 76 | |
| 77 | static iomux_v3_cfg_t const uart2_pads[] = { |
| 78 | MX6_PAD_EIM_D26__UART2_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 79 | MX6_PAD_EIM_D27__UART2_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL), |
| 80 | }; |
| 81 | |
| 82 | static void setup_iomux_uart(void) |
| 83 | { |
| 84 | imx_iomux_v3_setup_multiple_pads(uart2_pads, ARRAY_SIZE(uart2_pads)); |
| 85 | } |
| 86 | |
| 87 | iomux_v3_cfg_t const enet_pads[] = { |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 88 | /* AR8035 PHY Reset */ |
| 89 | MX6_PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(ENET_PAD_CTRL_PD), |
| 90 | /* AR8035 PHY Interrupt */ |
| 91 | MX6_PAD_ENET_TX_EN__GPIO1_IO28 | MUX_PAD_CTRL(ENET_PAD_CTRL), |
| 92 | }; |
| 93 | |
| 94 | static void setup_iomux_enet(void) |
| 95 | { |
| 96 | imx_iomux_v3_setup_multiple_pads(enet_pads, ARRAY_SIZE(enet_pads)); |
| 97 | |
| 98 | /* Reset AR8035 PHY */ |
| 99 | gpio_direction_output(IMX_GPIO_NR(3, 31) , 0); |
| 100 | mdelay(2); |
| 101 | gpio_set_value(IMX_GPIO_NR(3, 31), 1); |
| 102 | } |
| 103 | |
| 104 | int mx6_rgmii_rework(struct phy_device *phydev) |
| 105 | { |
| 106 | /* from linux/arch/arm/mach-imx/mach-imx6q.c : |
| 107 | * Ar803x phy SmartEEE feature cause link status generates glitch, |
| 108 | * which cause ethernet link down/up issue, so disable SmartEEE |
| 109 | */ |
| 110 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x7); |
| 111 | phy_write(phydev, MDIO_DEVAD_NONE, 0xe, 0x805d); |
| 112 | phy_write(phydev, MDIO_DEVAD_NONE, 0xd, 0x4003); |
| 113 | |
| 114 | return 0; |
| 115 | } |
| 116 | |
| 117 | int board_phy_config(struct phy_device *phydev) |
| 118 | { |
| 119 | mx6_rgmii_rework(phydev); |
| 120 | |
| 121 | if (phydev->drv->config) |
| 122 | phydev->drv->config(phydev); |
| 123 | |
| 124 | return 0; |
| 125 | } |
| 126 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 127 | #ifdef CONFIG_MXC_SPI |
| 128 | iomux_v3_cfg_t const ecspi1_pads[] = { |
| 129 | MX6_PAD_EIM_D16__ECSPI1_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL), |
| 130 | MX6_PAD_EIM_D17__ECSPI1_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL), |
| 131 | MX6_PAD_EIM_D18__ECSPI1_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL), |
| 132 | MX6_PAD_EIM_EB2__GPIO2_IO30 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 133 | }; |
| 134 | |
Nikita Kiryanov | 00cd738 | 2014-08-20 15:08:50 +0300 | [diff] [blame] | 135 | int board_spi_cs_gpio(unsigned bus, unsigned cs) |
| 136 | { |
| 137 | return (bus == 0 && cs == 0) ? (IMX_GPIO_NR(2, 30)) : -1; |
| 138 | } |
| 139 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 140 | static void setup_spi(void) |
| 141 | { |
| 142 | imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads)); |
| 143 | } |
| 144 | #endif |
| 145 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 146 | iomux_v3_cfg_t const tft_pads_riot[] = { |
| 147 | /* LCD_PWR_EN */ |
| 148 | MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 149 | /* TOUCH_INT */ |
| 150 | MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 151 | /* LED_PWR_EN */ |
| 152 | MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 153 | /* BL LEVEL */ |
| 154 | MX6_PAD_SD1_CMD__GPIO1_IO18 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 155 | }; |
| 156 | |
| 157 | iomux_v3_cfg_t const tft_pads_mars[] = { |
| 158 | /* LCD_PWR_EN */ |
| 159 | MX6_PAD_ENET_TXD1__GPIO1_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 160 | /* TOUCH_INT */ |
| 161 | MX6_PAD_NANDF_CS1__GPIO6_IO14 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 162 | /* LED_PWR_EN */ |
| 163 | MX6_PAD_NANDF_CS2__GPIO6_IO15 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 164 | /* BL LEVEL (PWM4) */ |
| 165 | MX6_PAD_SD4_DAT2__GPIO2_IO10 | MUX_PAD_CTRL(NO_PAD_CTRL), |
| 166 | }; |
| 167 | |
| 168 | #if defined(CONFIG_VIDEO_IPUV3) |
| 169 | |
| 170 | static void enable_lvds(struct display_info_t const *dev) |
| 171 | { |
| 172 | struct iomuxc *iomux = (struct iomuxc *) |
| 173 | IOMUXC_BASE_ADDR; |
| 174 | setbits_le32(&iomux->gpr[2], |
| 175 | IOMUXC_GPR2_DATA_WIDTH_CH0_24BIT); |
| 176 | /* set backlight level to ON */ |
| 177 | if (board_type == BOARD_IS_RIOTBOARD) |
| 178 | gpio_direction_output(IMX_GPIO_NR(1, 18) , 1); |
| 179 | else if (board_type == BOARD_IS_MARSBOARD) |
| 180 | gpio_direction_output(IMX_GPIO_NR(2, 10) , 1); |
| 181 | } |
| 182 | |
| 183 | static void disable_lvds(struct display_info_t const *dev) |
| 184 | { |
| 185 | struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; |
| 186 | |
| 187 | /* set backlight level to OFF */ |
| 188 | if (board_type == BOARD_IS_RIOTBOARD) |
| 189 | gpio_direction_output(IMX_GPIO_NR(1, 18) , 0); |
| 190 | else if (board_type == BOARD_IS_MARSBOARD) |
| 191 | gpio_direction_output(IMX_GPIO_NR(2, 10) , 0); |
| 192 | |
| 193 | clrbits_le32(&iomux->gpr[2], |
| 194 | IOMUXC_GPR2_LVDS_CH0_MODE_MASK); |
| 195 | } |
| 196 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 197 | static void do_enable_hdmi(struct display_info_t const *dev) |
| 198 | { |
| 199 | disable_lvds(dev); |
| 200 | imx_enable_hdmi_phy(); |
| 201 | } |
| 202 | |
| 203 | static int detect_i2c(struct display_info_t const *dev) |
| 204 | { |
Anatolij Gustschin | e4bde88 | 2024-07-20 17:35:39 +0200 | [diff] [blame] | 205 | struct udevice *udev = NULL; |
| 206 | int ret; |
| 207 | |
| 208 | ret = i2c_get_chip_for_busnum(dev->bus, dev->addr, 1, &udev); |
| 209 | return ret ? 0 : 1; |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 210 | } |
| 211 | |
| 212 | struct display_info_t const displays[] = {{ |
| 213 | .bus = -1, |
| 214 | .addr = 0, |
| 215 | .pixfmt = IPU_PIX_FMT_RGB24, |
| 216 | .detect = detect_hdmi, |
| 217 | .enable = do_enable_hdmi, |
| 218 | .mode = { |
| 219 | .name = "HDMI", |
| 220 | .refresh = 60, |
| 221 | .xres = 1024, |
| 222 | .yres = 768, |
| 223 | .pixclock = 15385, |
| 224 | .left_margin = 220, |
| 225 | .right_margin = 40, |
| 226 | .upper_margin = 21, |
| 227 | .lower_margin = 7, |
| 228 | .hsync_len = 60, |
| 229 | .vsync_len = 10, |
| 230 | .sync = FB_SYNC_EXT, |
| 231 | .vmode = FB_VMODE_NONINTERLACED |
| 232 | } }, { |
| 233 | .bus = 2, |
| 234 | .addr = 0x1, |
| 235 | .pixfmt = IPU_PIX_FMT_LVDS666, |
| 236 | .detect = detect_i2c, |
| 237 | .enable = enable_lvds, |
| 238 | .mode = { |
| 239 | .name = "LCD8000-97C", |
| 240 | .refresh = 60, |
| 241 | .xres = 1024, |
| 242 | .yres = 768, |
| 243 | .pixclock = 15385, |
| 244 | .left_margin = 100, |
| 245 | .right_margin = 200, |
| 246 | .upper_margin = 10, |
| 247 | .lower_margin = 20, |
| 248 | .hsync_len = 20, |
| 249 | .vsync_len = 8, |
| 250 | .sync = FB_SYNC_EXT, |
| 251 | .vmode = FB_VMODE_NONINTERLACED |
| 252 | } } }; |
| 253 | size_t display_count = ARRAY_SIZE(displays); |
| 254 | |
| 255 | static void setup_display(void) |
| 256 | { |
| 257 | struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; |
| 258 | struct iomuxc *iomux = (struct iomuxc *)IOMUXC_BASE_ADDR; |
| 259 | int reg; |
| 260 | |
| 261 | enable_ipu_clock(); |
| 262 | imx_setup_hdmi(); |
| 263 | |
| 264 | /* Turn on LDB0, IPU,IPU DI0 clocks */ |
| 265 | setbits_le32(&mxc_ccm->CCGR3, |
| 266 | MXC_CCM_CCGR3_LDB_DI0_MASK); |
| 267 | |
| 268 | /* set LDB0 clk select to 011/011 */ |
| 269 | clrsetbits_le32(&mxc_ccm->cs2cdr, |
| 270 | MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_MASK, |
| 271 | (3 << MXC_CCM_CS2CDR_LDB_DI0_CLK_SEL_OFFSET)); |
| 272 | |
| 273 | setbits_le32(&mxc_ccm->cscmr2, |
| 274 | MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); |
| 275 | |
| 276 | setbits_le32(&mxc_ccm->chsccdr, |
| 277 | (CHSCCDR_CLK_SEL_LDB_DI0 |
| 278 | << MXC_CCM_CHSCCDR_IPU1_DI0_CLK_SEL_OFFSET)); |
| 279 | |
| 280 | reg = IOMUXC_GPR2_BGREF_RRMODE_EXTERNAL_RES |
| 281 | | IOMUXC_GPR2_DI0_VS_POLARITY_ACTIVE_LOW |
| 282 | | IOMUXC_GPR2_BIT_MAPPING_CH1_SPWG |
| 283 | | IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT |
| 284 | | IOMUXC_GPR2_BIT_MAPPING_CH0_SPWG |
| 285 | | IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT |
| 286 | | IOMUXC_GPR2_LVDS_CH1_MODE_DISABLED |
| 287 | | IOMUXC_GPR2_LVDS_CH0_MODE_ENABLED_DI0; |
| 288 | writel(reg, &iomux->gpr[2]); |
| 289 | |
| 290 | clrsetbits_le32(&iomux->gpr[3], |
| 291 | IOMUXC_GPR3_LVDS0_MUX_CTL_MASK | |
| 292 | IOMUXC_GPR3_HDMI_MUX_CTL_MASK, |
| 293 | IOMUXC_GPR3_MUX_SRC_IPU1_DI0 |
| 294 | << IOMUXC_GPR3_LVDS0_MUX_CTL_OFFSET); |
| 295 | } |
| 296 | #endif /* CONFIG_VIDEO_IPUV3 */ |
| 297 | |
| 298 | /* |
| 299 | * Do not overwrite the console |
| 300 | * Use always serial for U-Boot console |
| 301 | */ |
| 302 | int overwrite_console(void) |
| 303 | { |
| 304 | return 1; |
| 305 | } |
| 306 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 307 | int board_early_init_f(void) |
| 308 | { |
| 309 | u32 cputype = cpu_type(get_cpu_rev()); |
| 310 | |
| 311 | switch (cputype) { |
| 312 | case MXC_CPU_MX6SOLO: |
| 313 | board_type = BOARD_IS_RIOTBOARD; |
| 314 | break; |
| 315 | case MXC_CPU_MX6D: |
| 316 | board_type = BOARD_IS_MARSBOARD; |
| 317 | break; |
| 318 | } |
| 319 | |
| 320 | setup_iomux_uart(); |
| 321 | |
| 322 | if (board_type == BOARD_IS_RIOTBOARD) |
| 323 | imx_iomux_v3_setup_multiple_pads( |
| 324 | tft_pads_riot, ARRAY_SIZE(tft_pads_riot)); |
| 325 | else if (board_type == BOARD_IS_MARSBOARD) |
| 326 | imx_iomux_v3_setup_multiple_pads( |
| 327 | tft_pads_mars, ARRAY_SIZE(tft_pads_mars)); |
| 328 | #if defined(CONFIG_VIDEO_IPUV3) |
| 329 | /* power ON LCD */ |
| 330 | gpio_direction_output(IMX_GPIO_NR(1, 29) , 1); |
| 331 | /* touch interrupt is an input */ |
| 332 | gpio_direction_input(IMX_GPIO_NR(6, 14)); |
| 333 | /* power ON backlight */ |
| 334 | gpio_direction_output(IMX_GPIO_NR(6, 15) , 1); |
| 335 | /* set backlight level to off */ |
| 336 | if (board_type == BOARD_IS_RIOTBOARD) |
| 337 | gpio_direction_output(IMX_GPIO_NR(1, 18) , 0); |
| 338 | else if (board_type == BOARD_IS_MARSBOARD) |
| 339 | gpio_direction_output(IMX_GPIO_NR(2, 10) , 0); |
| 340 | setup_display(); |
| 341 | #endif |
| 342 | |
| 343 | return 0; |
| 344 | } |
| 345 | |
| 346 | int board_init(void) |
| 347 | { |
| 348 | /* address of boot parameters */ |
| 349 | gd->bd->bi_boot_params = PHYS_SDRAM + 0x100; |
Anatolij Gustschin | e4bde88 | 2024-07-20 17:35:39 +0200 | [diff] [blame] | 350 | |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 351 | #ifdef CONFIG_MXC_SPI |
| 352 | setup_spi(); |
| 353 | #endif |
| 354 | return 0; |
| 355 | } |
| 356 | |
| 357 | #ifdef CONFIG_CMD_BMODE |
| 358 | static const struct boot_mode riotboard_boot_modes[] = { |
| 359 | {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, |
| 360 | {"sd3", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, |
| 361 | {"emmc", MAKE_CFGVAL(0x40, 0x38, 0x00, 0x00)}, |
| 362 | {NULL, 0}, |
| 363 | }; |
| 364 | static const struct boot_mode marsboard_boot_modes[] = { |
| 365 | {"sd2", MAKE_CFGVAL(0x40, 0x28, 0x00, 0x00)}, |
| 366 | {"emmc", MAKE_CFGVAL(0x40, 0x30, 0x00, 0x00)}, |
| 367 | {NULL, 0}, |
| 368 | }; |
| 369 | #endif |
| 370 | |
| 371 | int board_late_init(void) |
| 372 | { |
| 373 | #ifdef CONFIG_CMD_BMODE |
| 374 | if (board_type == BOARD_IS_RIOTBOARD) |
| 375 | add_board_boot_modes(riotboard_boot_modes); |
| 376 | else if (board_type == BOARD_IS_RIOTBOARD) |
| 377 | add_board_boot_modes(marsboard_boot_modes); |
| 378 | #endif |
Peter Robinson | fa89e83 | 2021-04-02 15:52:32 +0100 | [diff] [blame] | 379 | setup_iomux_enet(); |
Eric Benard | 2e66f3b | 2014-04-04 19:05:55 +0200 | [diff] [blame] | 380 | |
| 381 | return 0; |
| 382 | } |
| 383 | |
| 384 | int checkboard(void) |
| 385 | { |
| 386 | puts("Board: "); |
| 387 | if (board_type == BOARD_IS_MARSBOARD) |
| 388 | puts("MarSBoard\n"); |
| 389 | else if (board_type == BOARD_IS_RIOTBOARD) |
| 390 | puts("RIoTboard\n"); |
| 391 | else |
| 392 | printf("unknown - cputype : %02x\n", cpu_type(get_cpu_rev())); |
| 393 | |
| 394 | return 0; |
| 395 | } |
Fabien Lahoudere | a47a6a1 | 2018-11-08 11:28:05 +0100 | [diff] [blame] | 396 | |
Simon Glass | 49c24a8 | 2024-09-29 19:49:47 -0600 | [diff] [blame] | 397 | #ifdef CONFIG_XPL_BUILD |
Fabien Lahoudere | a47a6a1 | 2018-11-08 11:28:05 +0100 | [diff] [blame] | 398 | #include <spl.h> |
| 399 | |
| 400 | void board_init_f(ulong dummy) |
| 401 | { |
| 402 | u32 cputype = cpu_type(get_cpu_rev()); |
| 403 | |
| 404 | switch (cputype) { |
| 405 | case MXC_CPU_MX6SOLO: |
| 406 | board_type = BOARD_IS_RIOTBOARD; |
| 407 | break; |
| 408 | case MXC_CPU_MX6D: |
| 409 | board_type = BOARD_IS_MARSBOARD; |
| 410 | break; |
| 411 | } |
| 412 | arch_cpu_init(); |
| 413 | |
| 414 | /* setup GP timer */ |
| 415 | timer_init(); |
| 416 | |
Simon Glass | f4d6039 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 417 | #ifdef CONFIG_SPL_SERIAL |
Fabien Lahoudere | a47a6a1 | 2018-11-08 11:28:05 +0100 | [diff] [blame] | 418 | setup_iomux_uart(); |
| 419 | preloader_console_init(); |
| 420 | #endif |
| 421 | } |
| 422 | |
| 423 | void board_boot_order(u32 *spl_boot_list) |
| 424 | { |
| 425 | spl_boot_list[0] = BOOT_DEVICE_MMC1; |
| 426 | } |
| 427 | |
| 428 | /* |
| 429 | * In order to jump to standard u-boot shell, you have to connect pin 5 of J13 |
| 430 | * to pin 3 (ground). |
| 431 | */ |
| 432 | int spl_start_uboot(void) |
| 433 | { |
| 434 | int gpio_key = IMX_GPIO_NR(4, 16); |
| 435 | |
| 436 | gpio_direction_input(gpio_key); |
| 437 | if (gpio_get_value(gpio_key) == 0) |
| 438 | return 1; |
| 439 | else |
| 440 | return 0; |
| 441 | } |
| 442 | |
| 443 | #endif |