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git01.mediatek.com / filogic / uboot / 4d954ccc1bade7c6e248ad82259d5aa496915114 / . / arch / arm / include / asm / arch-s5pc2xx / gpio.h
blob: 8db5895b861539c650fa10b906520da95047c772 [file] [log] [blame]
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]1/*
2 * (C) Copyright 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21#ifndef __ASM_ARCH_GPIO_H
22#define __ASM_ARCH_GPIO_H
23
24#ifndef __ASSEMBLY__
25struct s5p_gpio_bank {
26 unsigned int con;
27 unsigned int dat;
28 unsigned int pull;
29 unsigned int drv;
30 unsigned int pdn_con;
31 unsigned int pdn_pull;
32 unsigned char res1[8];
33};
34
35struct s5pc210_gpio_part1 {
36 struct s5p_gpio_bank a0;
37 struct s5p_gpio_bank a1;
38 struct s5p_gpio_bank b;
39 struct s5p_gpio_bank c0;
40 struct s5p_gpio_bank c1;
41 struct s5p_gpio_bank d0;
42 struct s5p_gpio_bank d1;
43 struct s5p_gpio_bank e0;
44 struct s5p_gpio_bank e1;
45 struct s5p_gpio_bank e2;
46 struct s5p_gpio_bank e3;
47 struct s5p_gpio_bank e4;
48 struct s5p_gpio_bank f0;
49 struct s5p_gpio_bank f1;
50 struct s5p_gpio_bank f2;
51 struct s5p_gpio_bank f3;
52};
53
54struct s5pc210_gpio_part2 {
55 struct s5p_gpio_bank j0;
56 struct s5p_gpio_bank j1;
57 struct s5p_gpio_bank k0;
58 struct s5p_gpio_bank k1;
59 struct s5p_gpio_bank k2;
60 struct s5p_gpio_bank k3;
61 struct s5p_gpio_bank l0;
62 struct s5p_gpio_bank l1;
63 struct s5p_gpio_bank l2;
64 struct s5p_gpio_bank y0;
65 struct s5p_gpio_bank y1;
66 struct s5p_gpio_bank y2;
67 struct s5p_gpio_bank y3;
68 struct s5p_gpio_bank y4;
69 struct s5p_gpio_bank y5;
70 struct s5p_gpio_bank y6;
71 struct s5p_gpio_bank res1[80];
72 struct s5p_gpio_bank x0;
73 struct s5p_gpio_bank x1;
74 struct s5p_gpio_bank x2;
75 struct s5p_gpio_bank x3;
76};
77
78struct s5pc210_gpio_part3 {
79 struct s5p_gpio_bank z;
80};
81
82/* functions */
Łukasz Majewski4d954cc2011-07-15 00:16:22 +0000[diff] [blame^]83void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg);
84void s5p_gpio_direction_output(struct s5p_gpio_bank *bank, int gpio, int en);
85void s5p_gpio_direction_input(struct s5p_gpio_bank *bank, int gpio);
86void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en);
87unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio);
88void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode);
89void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode);
90void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode);
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]91#endif
92
93/* Pin configurations */
94#define GPIO_INPUT 0x0
95#define GPIO_OUTPUT 0x1
96#define GPIO_IRQ 0xf
97#define GPIO_FUNC(x) (x)
98
99/* Pull mode */
100#define GPIO_PULL_NONE 0x0
101#define GPIO_PULL_DOWN 0x1
Chander Kashyapb26418c2011-04-18 00:08:43 +0000[diff] [blame]102#define GPIO_PULL_UP 0x3
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]103
104/* Drive Strength level */
105#define GPIO_DRV_1X 0x0
Chander Kashyapb26418c2011-04-18 00:08:43 +0000[diff] [blame]106#define GPIO_DRV_3X 0x1
107#define GPIO_DRV_2X 0x2
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]108#define GPIO_DRV_4X 0x3
109#define GPIO_DRV_FAST 0x0
110#define GPIO_DRV_SLOW 0x1
Minkyu Kangb1b24682011-01-24 15:22:23 +0900[diff] [blame]111#endif