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git01.mediatek.com / filogic / uboot / 4d6e490e79d252f06d962b5df383c4ca90b69096 / . / drivers / Makefile
blob: eba9940231f9c925ca39d9999fcc2b5bcbe6e6dc [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1# SPDX-License-Identifier: GPL-2.0+
Tom Rini0cab3ec2015-11-10 01:06:16 +0000[diff] [blame]2
Simon Glassbb83ec52021-08-08 12:20:18 -0600[diff] [blame]3obj-$(CONFIG_$(SPL_TPL_)BOOTCOUNT_LIMIT) += bootcount/
Philippe Reynes3483aa22020-07-24 18:19:45 +0200[diff] [blame]4obj-$(CONFIG_$(SPL_TPL_)BUTTON) += button/
Ley Foon Tan54914d42019-10-11 13:48:33 +0800[diff] [blame]5obj-$(CONFIG_$(SPL_TPL_)CACHE) += cache/
Philipp Tomsichb7ac1c42017-07-04 11:29:55 +0200[diff] [blame]6obj-$(CONFIG_$(SPL_TPL_)CLK) += clk/
7obj-$(CONFIG_$(SPL_TPL_)DM) += core/
Simon Glass2710f9f2021-08-08 12:20:22 -0600[diff] [blame]8obj-$(CONFIG_$(SPL_TPL_)DMA) += dma/
9obj-$(CONFIG_$(SPL_TPL_)DMA_LEGACY) += dma/
Andrew F. Davis159eb4b2019-01-17 13:43:03 -0600[diff] [blame]10obj-$(CONFIG_$(SPL_TPL_)DFU) += dfu/
Simon Glass035939e2021-07-10 21:14:30 -0600[diff] [blame]11obj-$(CONFIG_$(SPL_TPL_)GPIO) += gpio/
Simon Glass284cb9c2021-07-10 21:14:31 -0600[diff] [blame]12obj-$(CONFIG_$(SPL_TPL_)DRIVERS_MISC) += misc/
Simon Goldschmidte5f741a2019-07-16 21:29:32 +0200[diff] [blame]13obj-$(CONFIG_$(SPL_TPL_)SYSRESET) += sysreset/
14obj-$(CONFIG_$(SPL_TPL_)FIRMWARE) +=firmware/
Simon Glassbccfc2e2021-07-10 21:14:36 -0600[diff] [blame]15obj-$(CONFIG_$(SPL_TPL_)I2C) += i2c/
Simon Glass592d5b92018-11-15 18:43:55 -0700[diff] [blame]16obj-$(CONFIG_$(SPL_TPL_)INPUT) += input/
Philipp Tomsichb7ac1c42017-07-04 11:29:55 +0200[diff] [blame]17obj-$(CONFIG_$(SPL_TPL_)LED) += led/
Simon Glassb58bfe02021-08-08 12:20:09 -0600[diff] [blame]18obj-$(CONFIG_$(SPL_TPL_)MMC) += mmc/
Miquel Raynal68f73562019-10-25 19:39:31 +0200[diff] [blame]19obj-y += mtd/
Jean-Jacques Hiblotf4f90562020-10-16 16:16:30 +0530[diff] [blame]20obj-$(CONFIG_$(SPL_)MULTIPLEXER) += mux/
Simon Glass1d926242021-08-08 12:20:31 -0600[diff] [blame]21obj-$(CONFIG_$(SPL_TPL_)ETH) += net/
Simon Glassff67f232021-08-08 12:20:10 -0600[diff] [blame]22obj-$(CONFIG_$(SPL_TPL_)PCH) += pch/
Sekhar Nori9108d922018-12-06 15:40:08 +0530[diff] [blame]23obj-$(CONFIG_$(SPL_TPL_)PCI) += pci/
Philipp Tomsichb7ac1c42017-07-04 11:29:55 +0200[diff] [blame]24obj-$(CONFIG_$(SPL_TPL_)PHY) += phy/
25obj-$(CONFIG_$(SPL_TPL_)PINCTRL) += pinctrl/
Simon Glassa0e44872021-08-08 12:20:29 -0600[diff] [blame]26obj-$(CONFIG_$(SPL_TPL_)POWER) += power/
Philipp Tomsichb7ac1c42017-07-04 11:29:55 +0200[diff] [blame]27obj-$(CONFIG_$(SPL_TPL_)RAM) += ram/
Simon Glass31985312021-08-08 12:20:11 -0600[diff] [blame]28obj-$(CONFIG_$(SPL_TPL_)RTC) += rtc/
Simon Glassf4d60392021-08-08 12:20:12 -0600[diff] [blame]29obj-$(CONFIG_$(SPL_TPL_)SERIAL) += serial/
Simon Glassa5820472021-08-08 12:20:14 -0600[diff] [blame]30obj-$(CONFIG_$(SPL_TPL_)SPI) += spi/
Philipp Tomsich4fac4ea2017-07-28 17:38:42 +0200[diff] [blame]31obj-$(CONFIG_$(SPL_TPL_)TIMER) += timer/
Bin Mengdb7ca2e2018-10-15 02:21:00 -0700[diff] [blame]32obj-$(CONFIG_$(SPL_TPL_)VIRTIO) += virtio/
Lokesh Vutla2aeb9342018-08-27 15:57:49 +0530[diff] [blame]33obj-$(CONFIG_$(SPL_)DM_MAILBOX) += mailbox/
Lokesh Vutla1a6f8e02018-08-27 15:57:53 +0530[diff] [blame]34obj-$(CONFIG_$(SPL_)REMOTEPROC) += remoteproc/
Simon Glass458b66a2020-11-05 06:32:05 -0700[diff] [blame]35obj-$(CONFIG_$(SPL_)SYSINFO) += sysinfo/
Simon Glass592d5b92018-11-15 18:43:55 -0700[diff] [blame]36obj-$(CONFIG_$(SPL_TPL_)TPM) += tpm/
Oleksandr Andrushchenko2280d332020-08-06 12:42:48 +0300[diff] [blame]37obj-$(CONFIG_XEN) += xen/
Michal Simek1aab1142020-09-09 14:41:56 +0200[diff] [blame]38obj-$(CONFIG_$(SPL_)FPGA) += fpga/
Masahiro Yamada95fc4ff2015-08-12 07:31:45 +0900[diff] [blame]39
Philipp Tomsichb7ac1c42017-07-04 11:29:55 +0200[diff] [blame]40ifndef CONFIG_TPL_BUILD
Simon Glass7eec8842022-04-30 00:56:52 -0600[diff] [blame]41ifndef CONFIG_VPL_BUILD
Masahiro Yamada39ba4b12015-08-12 07:31:44 +0900[diff] [blame]42ifdef CONFIG_SPL_BUILD
43
Simon Glass2f002162021-03-15 18:11:18 +1300[diff] [blame]44obj-$(CONFIG_SPL_CPU) += cpu/
Simon Glassa8437ce2021-07-10 21:14:25 -0600[diff] [blame]45obj-$(CONFIG_SPL_CRYPTO) += crypto/
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]46obj-$(CONFIG_SPL_MPC8XXX_INIT_DDR) += ddr/fsl/
Stefan Roeseeb083e52015-12-21 13:56:33 +0100[diff] [blame]47obj-$(CONFIG_ARMADA_38X) += ddr/marvell/a38x/
48obj-$(CONFIG_ARMADA_XP) += ddr/marvell/axp/
Ley Foon Tan17b9ba62019-05-06 09:55:59 +0800[diff] [blame]49obj-$(CONFIG_$(SPL_)ALTERA_SDRAM) += ddr/altera/
Peng Fan692f9432018-11-20 10:19:57 +0000[diff] [blame]50obj-$(CONFIG_ARCH_IMX8M) += ddr/imx/imx8m/
Ye Li56499f62021-08-07 16:01:11 +0800[diff] [blame]51obj-$(CONFIG_IMX8ULP_DRAM) += ddr/imx/imx8ulp/
Ye Lib2cfc422022-07-26 16:41:07 +0800[diff] [blame]52obj-$(CONFIG_ARCH_IMX9) += ddr/imx/imx9/
Ley Foon Tan9caf7122018-06-14 18:45:19 +0800[diff] [blame]53obj-$(CONFIG_SPL_DM_RESET) += reset/
Simon Glass762b9972021-07-10 21:14:27 -0600[diff] [blame]54obj-$(CONFIG_SPL_MUSB_NEW) += usb/musb-new/
Jean-Jacques Hiblot6a228522019-01-10 15:44:13 +0100[diff] [blame]55obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/
56obj-$(CONFIG_SPL_USB_GADGET) += usb/common/
57obj-$(CONFIG_SPL_USB_GADGET) += usb/gadget/udc/
Simon Glass1ba1d4e2021-07-10 21:14:28 -0600[diff] [blame]58obj-$(CONFIG_SPL_WATCHDOG) += watchdog/
Simon Glass1f2440c2021-07-10 21:14:29 -0600[diff] [blame]59obj-$(CONFIG_SPL_USB_HOST) += usb/host/
Masahiro Yamada39ba4b12015-08-12 07:31:44 +0900[diff] [blame]60obj-$(CONFIG_OMAP_USB_PHY) += usb/phy/
Simon Glass081a45a2021-08-08 12:20:17 -0600[diff] [blame]61obj-$(CONFIG_SPL_SATA) += ata/ scsi/
Tom Rini1794ae62018-12-05 08:23:38 -0500[diff] [blame]62obj-$(CONFIG_HAVE_BLOCK_DEVICE) += block/
Faiz Abbasae1627c2017-11-14 16:12:31 +0530[diff] [blame]63obj-$(CONFIG_SPL_THERMAL) += thermal/
Philipp Tomsichb7ac1c42017-07-04 11:29:55 +0200[diff] [blame]64
65endif
Simon Glass98b685d2016-09-12 23:18:25 -0600[diff] [blame]66endif
Simon Glass7eec8842022-04-30 00:56:52 -0600[diff] [blame]67endif
Simon Glass98b685d2016-09-12 23:18:25 -0600[diff] [blame]68
69ifdef CONFIG_TPL_BUILD
70
Simon Glass64571062021-08-08 12:20:16 -0600[diff] [blame]71obj-$(CONFIG_TPL_MPC8XXX_INIT_DDR) += ddr/fsl/
Simon Glass98b685d2016-09-12 23:18:25 -0600[diff] [blame]72
73endif
Masahiro Yamada39ba4b12015-08-12 07:31:44 +0900[diff] [blame]74
Simon Glass98b685d2016-09-12 23:18:25 -0600[diff] [blame]75ifeq ($(CONFIG_SPL_BUILD)$(CONFIG_TPL_BUILD),)
Masahiro Yamada39ba4b12015-08-12 07:31:44 +0900[diff] [blame]76
Przemyslaw Marczake0cb85b2015-10-27 13:08:00 +0100[diff] [blame]77obj-y += adc/
Simon Glass2c844c42017-06-14 21:28:26 -0600[diff] [blame]78obj-y += ata/
Masahiro Yamadadbdd4202020-07-09 15:08:18 +0900[diff] [blame]79obj-y += bus/
Masahiro Yamada69682982014-09-18 15:43:41 +0900[diff] [blame]80obj-$(CONFIG_DM_DEMO) += demo/
Masahiro Yamada62526982013-11-11 14:35:51 +0900[diff] [blame]81obj-$(CONFIG_BIOSEMU) += bios_emulator/
Masahiro Yamada887082a2013-10-17 20:38:52 +0900[diff] [blame]82obj-y += block/
Dinh Nguyend94e18e2019-04-23 16:55:03 -0500[diff] [blame]83obj-y += cache/
Simon Glass131a6452015-04-28 20:25:09 -0600[diff] [blame]84obj-$(CONFIG_CPU) += cpu/
Masahiro Yamada887082a2013-10-17 20:38:52 +0900[diff] [blame]85obj-y += crypto/
Alex Kiernaned6a41442018-05-29 15:30:41 +0000[diff] [blame]86obj-$(CONFIG_FASTBOOT) += fastboot/
Masahiro Yamada887082a2013-10-17 20:38:52 +0900[diff] [blame]87obj-y += misc/
Masahiro Yamadaa29e8d32017-05-09 20:31:40 +0900[diff] [blame]88obj-$(CONFIG_MMC) += mmc/
Zhikang Zhang145b88f2017-08-03 02:30:57 -0700[diff] [blame]89obj-$(CONFIG_NVME) += nvme/
Ramon Fried663686d2019-04-27 11:15:21 +0300[diff] [blame]90obj-$(CONFIG_PCI_ENDPOINT) += pci_endpoint/
Simon Glass98d88f82019-02-16 20:24:49 -0700[diff] [blame]91obj-y += dfu/
92obj-$(CONFIG_PCH) += pch/
Nandor Hanca6d5ad2021-06-10 16:56:43 +0300[diff] [blame]93obj-$(CONFIG_DM_REBOOT_MODE) += reboot-mode/
Masahiro Yamada887082a2013-10-17 20:38:52 +0900[diff] [blame]94obj-y += rtc/
Simon Glass3def0062017-06-14 21:28:27 -0600[diff] [blame]95obj-y += scsi/
Masahiro Yamada887082a2013-10-17 20:38:52 +0900[diff] [blame]96obj-y += sound/
Mateusz Kulikowski946797f2016-03-31 23:12:27 +0200[diff] [blame]97obj-y += spmi/
Masahiro Yamada887082a2013-10-17 20:38:52 +0900[diff] [blame]98obj-y += video/
99obj-y += watchdog/
Masahiro Yamada4fb1f692013-11-11 14:35:57 +0900[diff] [blame]100obj-$(CONFIG_QE) += qe/
Zhao Qiang5ad93952014-09-25 13:52:25 +0800[diff] [blame]101obj-$(CONFIG_U_QE) += qe/
Stephen Warrend0107832016-05-13 15:50:29 -0600[diff] [blame]102obj-y += mailbox/
Khoronzhuk, Ivan8062b052014-06-07 05:10:49 +0300[diff] [blame]103obj-y += memory/
Miquel Raynal68f73562019-10-25 19:39:31 +0200[diff] [blame]104obj-y += mtd/
Heiko Schocher2b387762014-07-18 06:07:19 +0200[diff] [blame]105obj-y += pwm/
Stephen Warren185ad872016-06-17 09:43:58 -0600[diff] [blame]106obj-y += reset/
Masahiro Yamada69682982014-09-18 15:43:41 +0900[diff] [blame]107obj-y += input/
Mark Kettenise1311b62021-10-23 16:58:01 +0200[diff] [blame]108obj-y += iommu/
Khoronzhuk, Ivandbfecb22014-10-22 17:18:21 +0300[diff] [blame]109# SOC specific infrastructure drivers.
Ramon Friedcf1e49f2018-07-02 02:57:55 +0300[diff] [blame]110obj-y += smem/
Ye.Lid049afa2014-11-20 21:14:13 +0800[diff] [blame]111obj-y += thermal/
Jens Wiklander14290442018-09-25 16:40:09 +0200[diff] [blame]112obj-$(CONFIG_TEE) += tee/
Mario Six573b1b92018-08-09 14:51:16 +0200[diff] [blame]113obj-y += axi/
Faiz Abbas5cc51072019-10-15 18:24:36 +0530[diff] [blame]114obj-y += ufs/
Maxime Ripardbdbdca32018-09-18 10:35:24 +0300[diff] [blame]115obj-$(CONFIG_W1) += w1/
Maxime Ripardf674fc02018-09-18 10:35:27 +0300[diff] [blame]116obj-$(CONFIG_W1_EEPROM) += w1-eeprom/
Masahiro Yamada39ba4b12015-08-12 07:31:44 +0900[diff] [blame]117
Purna Chandra Mandale80d11f2016-01-28 15:30:15 +0530[diff] [blame]118obj-$(CONFIG_MACH_PIC32) += ddr/microchip/
Andrew Sculld1d2c572022-05-30 10:00:08 +0000[diff] [blame]119obj-$(CONFIG_FUZZ) += fuzz/
Benjamin Gaignarda550b542018-11-27 13:49:50 +0100[diff] [blame]120obj-$(CONFIG_DM_HWSPINLOCK) += hwspinlock/
Sughosh Ganu90592ed2019-12-28 23:58:27 +0530[diff] [blame]121obj-$(CONFIG_DM_RNG) += rng/
Masahiro Yamada39ba4b12015-08-12 07:31:44 +0900[diff] [blame]122endif
Vignesh Raghavendra03ad1962020-02-04 11:09:48 +0530[diff] [blame]123
124obj-y += soc/