blob: 044db46f6fb43676627c835ba844871a6e5a89d7 [file] [log] [blame]
wdenk25521902003-09-13 19:01:12 +00001/*
2 * (C) Copyright 2003
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25
26#ifdef CONFIG_HARD_I2C
27
28#include <mpc5xxx.h>
29#include <i2c.h>
30
dzu62177922003-09-30 14:08:43 +000031#if (CFG_I2C_MODULE == 2)
wdenk25521902003-09-13 19:01:12 +000032#define I2C_BASE MPC5XXX_I2C2
dzu62177922003-09-30 14:08:43 +000033#elif (CFG_I2C_MODULE == 1)
wdenk25521902003-09-13 19:01:12 +000034#define I2C_BASE MPC5XXX_I2C1
dzu62177922003-09-30 14:08:43 +000035#else
36#error CFG_I2C_MODULE is not properly configured
wdenk25521902003-09-13 19:01:12 +000037#endif
38
39#define I2C_TIMEOUT 100
40#define I2C_RETRIES 3
41
dzu62177922003-09-30 14:08:43 +000042struct mpc5xxx_i2c_tap {
43 int scl2tap;
44 int tap2tap;
45};
46
wdenk25521902003-09-13 19:01:12 +000047static int mpc_reg_in (volatile u32 *reg);
48static void mpc_reg_out (volatile u32 *reg, int val, int mask);
49static int wait_for_bb (void);
50static int wait_for_pin (int *status);
51static int do_address (uchar chip, char rdwr_flag);
52static int send_bytes (uchar chip, char *buf, int len);
53static int receive_bytes (uchar chip, char *buf, int len);
dzu62177922003-09-30 14:08:43 +000054static int mpc_get_fdr (int);
wdenk25521902003-09-13 19:01:12 +000055
56static int mpc_reg_in(volatile u32 *reg)
57{
Wolfgang Denk7fb52662005-10-13 16:45:02 +020058 int ret = *reg >> 24;
wdenk25521902003-09-13 19:01:12 +000059 __asm__ __volatile__ ("eieio");
Wolfgang Denk7fb52662005-10-13 16:45:02 +020060 return ret;
wdenk25521902003-09-13 19:01:12 +000061}
62
63static void mpc_reg_out(volatile u32 *reg, int val, int mask)
64{
65 int tmp;
66
67 if (!mask) {
68 *reg = val << 24;
69 } else {
70 tmp = mpc_reg_in(reg);
71 *reg = ((tmp & ~mask) | (val & mask)) << 24;
72 }
73 __asm__ __volatile__ ("eieio");
74
75 return;
76}
77
78static int wait_for_bb(void)
79{
80 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
81 int timeout = I2C_TIMEOUT;
82 int status;
83
84 status = mpc_reg_in(&regs->msr);
85
86 while (timeout-- && (status & I2C_BB)) {
87#if 1
88 volatile int temp;
89 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
90 temp = mpc_reg_in(&regs->mdr);
91 mpc_reg_out(&regs->mcr, 0, I2C_STA);
92 mpc_reg_out(&regs->mcr, 0, 0);
93 mpc_reg_out(&regs->mcr, I2C_EN, 0);
94#endif
95 udelay(1000);
96 status = mpc_reg_in(&regs->msr);
97 }
98
99 return (status & I2C_BB);
100}
101
102static int wait_for_pin(int *status)
103{
104 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
105 int timeout = I2C_TIMEOUT;
106
107 *status = mpc_reg_in(&regs->msr);
108
109 while (timeout-- && !(*status & I2C_IF)) {
110 udelay(1000);
111 *status = mpc_reg_in(&regs->msr);
112 }
113
114 if (!(*status & I2C_IF)) {
115 return -1;
116 }
117
118 mpc_reg_out(&regs->msr, 0, I2C_IF);
119
120 return 0;
121}
122
123static int do_address(uchar chip, char rdwr_flag)
124{
125 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
126 int status;
127
128 chip <<= 1;
129
130 if (rdwr_flag) {
131 chip |= 1;
132 }
133
134 mpc_reg_out(&regs->mcr, I2C_TX, I2C_TX);
135 mpc_reg_out(&regs->mdr, chip, 0);
136
wdenk9c53f402003-10-15 23:53:47 +0000137 if (wait_for_pin(&status)) {
138 return -2;
139 }
wdenk25521902003-09-13 19:01:12 +0000140
wdenk9c53f402003-10-15 23:53:47 +0000141 if (status & I2C_RXAK) {
142 return -3;
143 }
wdenk25521902003-09-13 19:01:12 +0000144
145 return 0;
146}
147
148static int send_bytes(uchar chip, char *buf, int len)
149{
150 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
151 int wrcount;
152 int status;
153
154 for (wrcount = 0; wrcount < len; ++wrcount) {
155
156 mpc_reg_out(&regs->mdr, buf[wrcount], 0);
157
158 if (wait_for_pin(&status)) {
159 break;
160 }
161
162 if (status & I2C_RXAK) {
163 break;
164 }
165
166 }
167
168 return !(wrcount == len);
169}
170
171static int receive_bytes(uchar chip, char *buf, int len)
172{
173 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
174 int dummy = 1;
175 int rdcount = 0;
176 int status;
177 int i;
178
179 mpc_reg_out(&regs->mcr, 0, I2C_TX);
180
181 for (i = 0; i < len; ++i) {
182 buf[rdcount] = mpc_reg_in(&regs->mdr);
183
184 if (dummy) {
185 dummy = 0;
186 } else {
187 rdcount++;
188 }
189
190
191 if (wait_for_pin(&status)) {
192 return -4;
193 }
194 }
195
196 mpc_reg_out(&regs->mcr, I2C_TXAK, I2C_TXAK);
197 buf[rdcount++] = mpc_reg_in(&regs->mdr);
198
199 if (wait_for_pin(&status)) {
200 return -5;
201 }
202
203 mpc_reg_out(&regs->mcr, 0, I2C_TXAK);
204
205 return 0;
206}
207
208/**************** I2C API ****************/
209
210void i2c_init(int speed, int saddr)
211{
212 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
213
214 mpc_reg_out(&regs->mcr, 0, 0);
215 mpc_reg_out(&regs->madr, saddr << 1, 0);
216
217 /* Set clock
218 */
dzu62177922003-09-30 14:08:43 +0000219 mpc_reg_out(&regs->mfdr, mpc_get_fdr(speed), 0);
wdenk25521902003-09-13 19:01:12 +0000220
221 /* Enable module
222 */
223 mpc_reg_out(&regs->mcr, I2C_EN, I2C_INIT_MASK);
224 mpc_reg_out(&regs->msr, 0, I2C_IF);
225
226 return;
227}
228
dzu62177922003-09-30 14:08:43 +0000229static int mpc_get_fdr(int speed)
230{
231 DECLARE_GLOBAL_DATA_PTR;
232 static int fdr = -1;
dzu62177922003-09-30 14:08:43 +0000233
234 if (fdr == -1) {
wdenk4b16c2e2003-11-07 13:42:26 +0000235 ulong best_speed = 0;
236 ulong divider;
dzu62177922003-09-30 14:08:43 +0000237 ulong ipb, scl;
238 ulong bestmatch = 0xffffffffUL;
239 int best_i = 0, best_j = 0, i, j;
240 int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8};
241 struct mpc5xxx_i2c_tap scltap[] = {
242 {4, 1},
243 {4, 2},
244 {6, 4},
245 {6, 8},
246 {14, 16},
247 {30, 32},
248 {62, 64},
249 {126, 128}
250 };
251
252 ipb = gd->ipb_clk;
253 for (i = 7; i >= 0; i--) {
254 for (j = 7; j >= 0; j--) {
wdenk9c53f402003-10-15 23:53:47 +0000255 scl = 2 * (scltap[j].scl2tap +
dzu62177922003-09-30 14:08:43 +0000256 (SCL_Tap[i] - 1) * scltap[j].tap2tap + 2);
257 if (ipb <= speed*scl) {
258 if ((speed*scl - ipb) < bestmatch) {
259 bestmatch = speed*scl - ipb;
260 best_i = i;
261 best_j = j;
262 best_speed = ipb/scl;
263 }
264 }
265 }
266 }
wdenk4b16c2e2003-11-07 13:42:26 +0000267 divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2);
268 if (gd->flags & GD_FLG_RELOC) {
269 fdr = divider;
270 } else {
271 printf("%ld kHz, ", best_speed / 1000);
272 return divider;
273 }
dzu62177922003-09-30 14:08:43 +0000274 }
275
276 return fdr;
277}
278
wdenk25521902003-09-13 19:01:12 +0000279int i2c_probe(uchar chip)
280{
281 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
282 int i;
283
284 for (i = 0; i < I2C_RETRIES; i++) {
285 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
286
287 if (! do_address(chip, 0)) {
288 mpc_reg_out(&regs->mcr, 0, I2C_STA);
wdenk604b7a12004-06-09 15:29:49 +0000289 udelay(500);
wdenk25521902003-09-13 19:01:12 +0000290 break;
291 }
292
293 mpc_reg_out(&regs->mcr, 0, I2C_STA);
294 udelay(500);
295 }
296
297 return (i == I2C_RETRIES);
298}
299
300int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
301{
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200302 char xaddr[4];
wdenk25521902003-09-13 19:01:12 +0000303 struct mpc5xxx_i2c * regs = (struct mpc5xxx_i2c *)I2C_BASE;
304 int ret = -1;
305
306 xaddr[0] = (addr >> 24) & 0xFF;
307 xaddr[1] = (addr >> 16) & 0xFF;
308 xaddr[2] = (addr >> 8) & 0xFF;
309 xaddr[3] = addr & 0xFF;
310
311 if (wait_for_bb()) {
312 printf("i2c_read: bus is busy\n");
313 goto Done;
314 }
315
316 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
317 if (do_address(chip, 0)) {
318 printf("i2c_read: failed to address chip\n");
319 goto Done;
320 }
321
322 if (send_bytes(chip, &xaddr[4-alen], alen)) {
323 printf("i2c_read: send_bytes failed\n");
324 goto Done;
325 }
326
327 mpc_reg_out(&regs->mcr, I2C_RSTA, I2C_RSTA);
328 if (do_address(chip, 1)) {
329 printf("i2c_read: failed to address chip\n");
330 goto Done;
331 }
332
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200333 if (receive_bytes(chip, (char *)buf, len)) {
wdenk25521902003-09-13 19:01:12 +0000334 printf("i2c_read: receive_bytes failed\n");
335 goto Done;
336 }
337
338 ret = 0;
339Done:
340 mpc_reg_out(&regs->mcr, 0, I2C_STA);
341 return ret;
342}
343
344int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
345{
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200346 char xaddr[4];
wdenk25521902003-09-13 19:01:12 +0000347 struct mpc5xxx_i2c *regs = (struct mpc5xxx_i2c *)I2C_BASE;
348 int ret = -1;
349
350 xaddr[0] = (addr >> 24) & 0xFF;
351 xaddr[1] = (addr >> 16) & 0xFF;
352 xaddr[2] = (addr >> 8) & 0xFF;
353 xaddr[3] = addr & 0xFF;
354
wdenk9c53f402003-10-15 23:53:47 +0000355 if (wait_for_bb()) {
wdenk25521902003-09-13 19:01:12 +0000356 printf("i2c_write: bus is busy\n");
357 goto Done;
358 }
359
wdenk9c53f402003-10-15 23:53:47 +0000360 mpc_reg_out(&regs->mcr, I2C_STA, I2C_STA);
361 if (do_address(chip, 0)) {
wdenk25521902003-09-13 19:01:12 +0000362 printf("i2c_write: failed to address chip\n");
363 goto Done;
364 }
365
366 if (send_bytes(chip, &xaddr[4-alen], alen)) {
367 printf("i2c_write: send_bytes failed\n");
368 goto Done;
369 }
370
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200371 if (send_bytes(chip, (char *)buf, len)) {
wdenk25521902003-09-13 19:01:12 +0000372 printf("i2c_write: send_bytes failed\n");
373 goto Done;
374 }
375
376 ret = 0;
377Done:
378 mpc_reg_out(&regs->mcr, 0, I2C_STA);
379 return ret;
380}
381
382uchar i2c_reg_read(uchar chip, uchar reg)
383{
Wolfgang Denk7fb52662005-10-13 16:45:02 +0200384 uchar buf;
wdenk25521902003-09-13 19:01:12 +0000385
386 i2c_read(chip, reg, 1, &buf, 1);
387
388 return buf;
389}
390
391void i2c_reg_write(uchar chip, uchar reg, uchar val)
392{
393 i2c_write(chip, reg, 1, &val, 1);
394
395 return;
396}
397
398#endif /* CONFIG_HARD_I2C */