Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2002 |
| 3 | * Daniel Engström, Omicron Ceti AB, daniel@omicron.se. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | OUTPUT_FORMAT("elf32-i386", "elf32-i386", "elf32-i386") |
| 25 | OUTPUT_ARCH(i386) |
| 26 | ENTRY(_start) |
| 27 | |
| 28 | SECTIONS |
| 29 | { |
Graeme Russ | 2b158e2 | 2010-10-07 20:03:18 +1100 | [diff] [blame] | 30 | . = TEXT_BASE; /* Location of bootcode in flash */ |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 31 | _i386boot_text_start = .; |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 32 | .text : { *(.text); } |
| 33 | |
| 34 | . = ALIGN(4); |
Trent Piepho | 4438e5e | 2009-02-18 15:22:05 -0800 | [diff] [blame] | 35 | .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 36 | |
| 37 | _i386boot_text_size = SIZEOF(.text) + SIZEOF(.rodata); |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 38 | . = ALIGN(4); |
| 39 | |
| 40 | .data : { *(.data) } |
| 41 | . = ALIGN(4); |
| 42 | |
| 43 | .interp : { *(.interp) } |
| 44 | . = ALIGN(4); |
| 45 | |
| 46 | .dynsym : { *(.dynsym) } |
| 47 | . = ALIGN(4); |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 48 | |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 49 | .dynstr : { *(.dynstr) } |
| 50 | . = ALIGN(4); |
| 51 | |
| 52 | .hash : { *(.hash) } |
| 53 | . = ALIGN(4); |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 54 | |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 55 | .got : { *(.got) } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 56 | . = ALIGN(4); |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 57 | |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 58 | .got.plt : { *(.got.plt) } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 59 | . = ALIGN(4); |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 60 | |
| 61 | .dynamic (NOLOAD) : { *(.dynamic) } |
| 62 | . = ALIGN(4); |
| 63 | |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 64 | __u_boot_cmd_start = .; |
| 65 | .u_boot_cmd : { *(.u_boot_cmd) } |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 66 | . = ALIGN(4); |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 67 | __u_boot_cmd_end = .; |
| 68 | _i386boot_cmd_start = LOADADDR(.u_boot_cmd); |
| 69 | |
Graeme Russ | 078395c | 2009-11-24 20:04:21 +1100 | [diff] [blame] | 70 | _i386boot_rel_dyn_start = .; |
| 71 | .rel.dyn : { *(.rel.dyn) } |
| 72 | _i386boot_rel_dyn_end = .; |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 73 | |
| 74 | . = ALIGN(4); |
| 75 | _i386boot_bss_start = ABSOLUTE(.); |
| 76 | .bss (NOLOAD) : { *(.bss) } |
| 77 | _i386boot_bss_size = SIZEOF(.bss); |
| 78 | |
| 79 | /* 16bit realmode trampoline code */ |
Graeme Russ | 4cde5d0 | 2010-10-07 20:03:20 +1100 | [diff] [blame^] | 80 | .realmode 0x7c0 : AT ( LOADADDR(.rel.dyn) + SIZEOF(.rel.dyn) ) { KEEP(*(.realmode)) } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 81 | |
| 82 | _i386boot_realmode = LOADADDR(.realmode); |
| 83 | _i386boot_realmode_size = SIZEOF(.realmode); |
| 84 | |
| 85 | /* 16bit BIOS emulation code (just enough to boot Linux) */ |
Graeme Russ | 4cde5d0 | 2010-10-07 20:03:20 +1100 | [diff] [blame^] | 86 | .bios 0 : AT ( LOADADDR(.realmode) + SIZEOF(.realmode) ) { KEEP(*(.bios)) } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 87 | |
| 88 | _i386boot_bios = LOADADDR(.bios); |
| 89 | _i386boot_bios_size = SIZEOF(.bios); |
| 90 | |
| 91 | /* The load addresses below assumes that the flash |
| 92 | * will be mapped so that 0x387f0000 == 0xffff0000 |
| 93 | * at reset time |
| 94 | * |
| 95 | * The fe00 and ff00 offsets of the start32 and start16 |
| 96 | * segments are arbitrary, the just have to be mapped |
| 97 | * at reset and the code have to fit. |
Graeme Russ | 461bbe2 | 2008-12-07 10:28:58 +1100 | [diff] [blame] | 98 | * The fff0 offset of resetvec is important, however. |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 99 | */ |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 100 | . = 0xfffffe00; |
Graeme Russ | 4cde5d0 | 2010-10-07 20:03:20 +1100 | [diff] [blame^] | 101 | .start32 : AT (TEXT_BASE + 0x3fe00) { KEEP(*(.start32)); } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 102 | |
| 103 | . = 0xf800; |
Graeme Russ | 4cde5d0 | 2010-10-07 20:03:20 +1100 | [diff] [blame^] | 104 | .start16 : AT (TEXT_BASE + 0x3f800) { KEEP(*(.start16)); } |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 105 | |
| 106 | . = 0xfff0; |
Graeme Russ | 4cde5d0 | 2010-10-07 20:03:20 +1100 | [diff] [blame^] | 107 | .resetvec : AT (TEXT_BASE + 0x3fff0) { KEEP(*(.resetvec)); } |
Graeme Russ | 461bbe2 | 2008-12-07 10:28:58 +1100 | [diff] [blame] | 108 | _i386boot_end = (LOADADDR(.resetvec) + SIZEOF(.resetvec) ); |
Graeme Russ | e56d397 | 2008-12-07 10:28:57 +1100 | [diff] [blame] | 109 | } |