Peter Tyser | 4c82e72 | 2009-05-21 12:09:59 -0500 | [diff] [blame^] | 1 | /* |
| 2 | * Freescale DMA Controller |
| 3 | * |
| 4 | * Copyright 2006 Freescale Semiconductor, Inc. |
| 5 | * |
| 6 | * This software may be used and distributed according to the |
| 7 | * terms of the GNU Public License, Version 2, incorporated |
| 8 | * herein by reference. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or |
| 11 | * modify it under the terms of the GNU General Public License |
| 12 | * Version 2 as published by the Free Software Foundation. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 22 | * MA 02111-1307 USA |
| 23 | */ |
| 24 | |
| 25 | #ifndef _ASM_FSL_DMA_H_ |
| 26 | #define _ASM_FSL_DMA_H_ |
| 27 | |
| 28 | #include <asm/types.h> |
| 29 | |
| 30 | typedef struct fsl_dma { |
| 31 | uint mr; /* DMA mode register */ |
| 32 | uint sr; /* DMA status register */ |
| 33 | char res0[4]; |
| 34 | uint clndar; /* DMA current link descriptor address register */ |
| 35 | uint satr; /* DMA source attributes register */ |
| 36 | uint sar; /* DMA source address register */ |
| 37 | uint datr; /* DMA destination attributes register */ |
| 38 | uint dar; /* DMA destination address register */ |
| 39 | uint bcr; /* DMA byte count register */ |
| 40 | char res1[4]; |
| 41 | uint nlndar; /* DMA next link descriptor address register */ |
| 42 | char res2[8]; |
| 43 | uint clabdar; /* DMA current List - alternate base descriptor address Register */ |
| 44 | char res3[4]; |
| 45 | uint nlsdar; /* DMA next list descriptor address register */ |
| 46 | uint ssr; /* DMA source stride register */ |
| 47 | uint dsr; /* DMA destination stride register */ |
| 48 | char res4[56]; |
| 49 | } fsl_dma_t; |
| 50 | |
| 51 | #endif /* _ASM_DMA_H_ */ |