blob: 539e7cef93b6cff011cc845c4ad63865700d1901 [file] [log] [blame]
Stephen Warren952a5732015-08-05 11:52:08 -06001/dts-v1/;
2
3#include "tegra210.dtsi"
4
5/ {
6 model = "NVIDIA P2371-0000";
7 compatible = "nvidia,p2371-0000", "nvidia,tegra210";
8
9 chosen {
10 stdout-path = &uarta;
11 };
12
13 aliases {
Stephen Warren68555202016-09-13 10:45:49 -060014 i2c0 = "/i2c@7000d000";
15 mmc0 = "/sdhci@700b0600";
16 mmc1 = "/sdhci@700b0000";
17 usb0 = "/usb@7d000000";
Stephen Warren952a5732015-08-05 11:52:08 -060018 };
19
20 memory {
21 reg = <0x0 0x80000000 0x0 0xc0000000>;
22 };
23
Stephen Warren68555202016-09-13 10:45:49 -060024 sdhci@700b0000 {
Stephen Warren952a5732015-08-05 11:52:08 -060025 status = "okay";
26 cd-gpios = <&gpio TEGRA_GPIO(Z, 1) GPIO_ACTIVE_LOW>;
27 power-gpios = <&gpio TEGRA_GPIO(Z, 4) GPIO_ACTIVE_HIGH>;
28 bus-width = <4>;
29 };
30
Stephen Warren68555202016-09-13 10:45:49 -060031 sdhci@700b0600 {
Stephen Warren952a5732015-08-05 11:52:08 -060032 status = "okay";
33 bus-width = <8>;
Tom Warren1c77f022016-09-13 10:45:42 -060034 non-removable;
Stephen Warren952a5732015-08-05 11:52:08 -060035 };
36
Stephen Warren68555202016-09-13 10:45:49 -060037 i2c@7000d000 {
Stephen Warren952a5732015-08-05 11:52:08 -060038 status = "okay";
39 clock-frequency = <400000>;
40 };
41
Stephen Warren68555202016-09-13 10:45:49 -060042 usb@7d000000 {
Stephen Warren952a5732015-08-05 11:52:08 -060043 status = "okay";
44 dr_mode = "otg";
45 nvidia,vbus-gpio = <&gpio TEGRA_GPIO(CC, 4) GPIO_ACTIVE_HIGH>;
46 };
47
48 clocks {
49 compatible = "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <0>;
52
53 clk32k_in: clock@0 {
54 compatible = "fixed-clock";
55 reg = <0>;
56 #clock-cells = <0>;
57 clock-frequency = <32768>;
58 };
59 };
60};
Simon Glass2a00cc92017-06-12 06:22:01 -060061
62&uarta {
63 status = "okay";
64};