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git01.mediatek.com / filogic / uboot / 4b85fb16b9bfe8a8b948f8022eae2825a6b46089 / . / arch / sandbox / dts / test.dts
blob: f5217fb87778614f783483ef7b0ee774b64ca2c3 [file] [log] [blame]
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]1/dts-v1/;
2
3/ {
4 model = "sandbox";
5 compatible = "sandbox";
6 #address-cells = <1>;
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]7 #size-cells = <1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]8
Simon Glassfef72b72014-07-23 06:55:03 -0600[diff] [blame]9 aliases {
10 console = &uart0;
Simon Glass5b968632015-05-22 15:42:15 -0600[diff] [blame]11 eth0 = "/eth@10002000";
Bin Meng04a11cb2015-08-27 22:25:53 -0700[diff] [blame]12 eth3 = &eth_3;
Simon Glass5b968632015-05-22 15:42:15 -0600[diff] [blame]13 eth5 = &eth_5;
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]14 i2c0 = "/i2c@0";
Przemyslaw Marczak3dbb55e2015-05-13 13:38:34 +0200[diff] [blame]15 pci0 = &pci;
Simon Glass336b2952015-05-22 15:42:17 -0600[diff] [blame]16 rtc0 = &rtc_0;
17 rtc1 = &rtc_1;
Simon Glass5b968632015-05-22 15:42:15 -0600[diff] [blame]18 spi0 = "/spi@0";
Przemyslaw Marczak3dbb55e2015-05-13 13:38:34 +0200[diff] [blame]19 testfdt6 = "/e-test";
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]20 testbus3 = "/some-bus";
21 testfdt0 = "/some-bus/c-test@0";
22 testfdt1 = "/some-bus/c-test@1";
23 testfdt3 = "/b-test";
24 testfdt5 = "/some-bus/c-test@5";
25 testfdt8 = "/a-test";
Simon Glass31680482015-03-25 12:23:05 -0600[diff] [blame]26 usb0 = &usb_0;
27 usb1 = &usb_1;
28 usb2 = &usb_2;
Simon Glassfef72b72014-07-23 06:55:03 -0600[diff] [blame]29 };
30
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]31 a-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]32 reg = <0 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]33 compatible = "denx,u-boot-fdt-test";
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]34 ping-expect = <0>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]35 ping-add = <0>;
Simon Glassfef72b72014-07-23 06:55:03 -0600[diff] [blame]36 u-boot,dm-pre-reloc;
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]37 test-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 5 0 3 2 1>,
38 <0>, <&gpio_a 12>;
39 test2-gpios = <&gpio_a 1>, <&gpio_a 4>, <&gpio_b 6 1 3 2 1>,
40 <&gpio_b 7 2 3 2 1>, <&gpio_b 8 4 3 2 1>,
41 <&gpio_b 9 0xc 3 2 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]42 };
43
44 junk {
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]45 reg = <1 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]46 compatible = "not,compatible";
47 };
48
49 no-compatible {
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]50 reg = <2 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]51 };
52
53 b-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]54 reg = <3 1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]55 compatible = "denx,u-boot-fdt-test";
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]56 ping-expect = <3>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]57 ping-add = <3>;
58 };
59
60 some-bus {
61 #address-cells = <1>;
62 #size-cells = <0>;
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]63 compatible = "denx,u-boot-test-bus";
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]64 reg = <3 1>;
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]65 ping-expect = <4>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]66 ping-add = <4>;
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]67 c-test@5 {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]68 compatible = "denx,u-boot-fdt-test";
69 reg = <5>;
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]70 ping-expect = <5>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]71 ping-add = <5>;
72 };
Simon Glass40717422014-07-23 06:55:18 -0600[diff] [blame]73 c-test@0 {
74 compatible = "denx,u-boot-fdt-test";
75 reg = <0>;
76 ping-expect = <6>;
77 ping-add = <6>;
78 };
79 c-test@1 {
80 compatible = "denx,u-boot-fdt-test";
81 reg = <1>;
82 ping-expect = <7>;
83 ping-add = <7>;
84 };
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]85 };
86
87 d-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]88 reg = <3 1>;
Simon Glassdb6f0202014-07-23 06:55:12 -0600[diff] [blame]89 ping-expect = <6>;
90 ping-add = <6>;
91 compatible = "google,another-fdt-test";
92 };
93
94 e-test {
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]95 reg = <3 1>;
Simon Glassa7bb08a2014-07-23 06:54:57 -0600[diff] [blame]96 ping-expect = <6>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]97 ping-add = <6>;
98 compatible = "google,another-fdt-test";
99 };
100
Simon Glass0ccb0972015-01-25 08:27:05 -0700[diff] [blame]101 f-test {
102 compatible = "denx,u-boot-fdt-test";
103 };
104
105 g-test {
106 compatible = "denx,u-boot-fdt-test";
107 };
108
Simon Glass8cc4d822015-07-06 12:54:24 -0600[diff] [blame]109 clk@0 {
110 compatible = "sandbox,clk";
111 };
112
Simon Glass5b968632015-05-22 15:42:15 -0600[diff] [blame]113 eth@10002000 {
114 compatible = "sandbox,eth";
115 reg = <0x10002000 0x1000>;
116 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x00>;
117 };
118
119 eth_5: eth@10003000 {
120 compatible = "sandbox,eth";
121 reg = <0x10003000 0x1000>;
122 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x11>;
123 };
124
Bin Meng04a11cb2015-08-27 22:25:53 -0700[diff] [blame]125 eth_3: sbe5 {
126 compatible = "sandbox,eth";
127 reg = <0x10005000 0x1000>;
128 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x33>;
129 };
130
Simon Glass5b968632015-05-22 15:42:15 -0600[diff] [blame]131 eth@10004000 {
132 compatible = "sandbox,eth";
133 reg = <0x10004000 0x1000>;
134 fake-host-hwaddr = <0x00 0x00 0x66 0x44 0x22 0x22>;
135 };
136
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]137 gpio_a: base-gpios {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]138 compatible = "sandbox,gpio";
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]139 gpio-controller;
140 #gpio-cells = <1>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]141 gpio-bank-name = "a";
142 num-gpios = <20>;
143 };
144
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]145 gpio_b: extra-gpios {
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]146 compatible = "sandbox,gpio";
Simon Glass16e10402015-01-05 20:05:29 -0700[diff] [blame]147 gpio-controller;
148 #gpio-cells = <5>;
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]149 gpio-bank-name = "b";
150 num-gpios = <10>;
151 };
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]152
Simon Glass7df766e2014-12-10 08:55:55 -0700[diff] [blame]153 i2c@0 {
154 #address-cells = <1>;
155 #size-cells = <0>;
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]156 reg = <0 1>;
Simon Glass7df766e2014-12-10 08:55:55 -0700[diff] [blame]157 compatible = "sandbox,i2c";
158 clock-frequency = <100000>;
159 eeprom@2c {
160 reg = <0x2c>;
161 compatible = "i2c-eeprom";
162 emul {
163 compatible = "sandbox,i2c-eeprom";
164 sandbox,filename = "i2c.bin";
165 sandbox,size = <256>;
166 };
167 };
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200[diff] [blame]168
Simon Glass336b2952015-05-22 15:42:17 -0600[diff] [blame]169 rtc_0: rtc@43 {
170 reg = <0x43>;
171 compatible = "sandbox-rtc";
172 emul {
173 compatible = "sandbox,i2c-rtc";
174 };
175 };
176
177 rtc_1: rtc@61 {
178 reg = <0x61>;
179 compatible = "sandbox-rtc";
180 emul {
181 compatible = "sandbox,i2c-rtc";
182 };
183 };
184
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200[diff] [blame]185 sandbox_pmic: sandbox_pmic {
186 reg = <0x40>;
187 };
Simon Glass7df766e2014-12-10 08:55:55 -0700[diff] [blame]188 };
189
Simon Glassd783eb32015-07-06 12:54:34 -0600[diff] [blame]190 leds {
191 compatible = "gpio-leds";
192
193 iracibble {
194 gpios = <&gpio_a 1 0>;
195 label = "sandbox:red";
196 };
197
198 martinet {
199 gpios = <&gpio_a 2 0>;
200 label = "sandbox:green";
201 };
202 };
203
Simon Glassd3e58e42015-07-06 12:54:32 -0600[diff] [blame]204 mmc {
205 compatible = "sandbox,mmc";
206 };
207
Simon Glass3a6eae62015-03-05 12:25:34 -0700[diff] [blame]208 pci: pci-controller {
209 compatible = "sandbox,pci";
210 device_type = "pci";
211 #address-cells = <3>;
212 #size-cells = <2>;
213 ranges = <0x02000000 0 0x10000000 0x10000000 0 0x2000
214 0x01000000 0 0x20000000 0x20000000 0 0x2000>;
215 pci@1f,0 {
216 compatible = "pci-generic";
217 reg = <0xf800 0 0 0 0>;
218 emul@1f,0 {
219 compatible = "sandbox,swap-case";
220 };
221 };
222 };
223
Simon Glass3d355e62015-07-06 12:54:31 -0600[diff] [blame]224 ram {
225 compatible = "sandbox,ram";
226 };
227
Simon Glassd860f222015-07-06 12:54:29 -0600[diff] [blame]228 reset@0 {
229 compatible = "sandbox,warm-reset";
230 };
231
232 reset@1 {
233 compatible = "sandbox,reset";
234 };
235
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]236 spi@0 {
237 #address-cells = <1>;
238 #size-cells = <0>;
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]239 reg = <0 1>;
Simon Glass25348a42014-10-13 23:42:11 -0600[diff] [blame]240 compatible = "sandbox,spi";
241 cs-gpios = <0>, <&gpio_a 0>;
242 spi.bin@0 {
243 reg = <0>;
244 compatible = "spansion,m25p16", "spi-flash";
245 spi-max-frequency = <40000000>;
246 sandbox,filename = "spi.bin";
247 };
248 };
249
Simon Glasscd556522015-07-06 12:54:35 -0600[diff] [blame]250 syscon@0 {
251 compatible = "sandbox,syscon0";
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]252 reg = <0x10 4>;
Simon Glasscd556522015-07-06 12:54:35 -0600[diff] [blame]253 };
254
255 syscon@1 {
256 compatible = "sandbox,syscon1";
Simon Glasscf61f742015-07-06 12:54:36 -0600[diff] [blame]257 reg = <0x20 5
258 0x28 6
259 0x30 7
260 0x38 8>;
Simon Glasscd556522015-07-06 12:54:35 -0600[diff] [blame]261 };
262
Simon Glass5b968632015-05-22 15:42:15 -0600[diff] [blame]263 uart0: serial {
264 compatible = "sandbox,serial";
265 u-boot,dm-pre-reloc;
Joe Hershberger4c197242015-03-22 17:09:15 -0500[diff] [blame]266 };
267
Simon Glass31680482015-03-25 12:23:05 -0600[diff] [blame]268 usb_0: usb@0 {
269 compatible = "sandbox,usb";
270 status = "disabled";
271 hub {
272 compatible = "sandbox,usb-hub";
273 #address-cells = <1>;
274 #size-cells = <0>;
275 flash-stick {
276 reg = <0>;
277 compatible = "sandbox,usb-flash";
278 };
279 };
280 };
281
282 usb_1: usb@1 {
283 compatible = "sandbox,usb";
284 hub {
285 compatible = "usb-hub";
286 usb,device-class = <9>;
287 hub-emul {
288 compatible = "sandbox,usb-hub";
289 #address-cells = <1>;
290 #size-cells = <0>;
291 flash-stick {
292 reg = <0>;
293 compatible = "sandbox,usb-flash";
294 sandbox,filepath = "testflash.bin";
295 };
296
297 };
298 };
299 };
300
301 usb_2: usb@2 {
302 compatible = "sandbox,usb";
303 status = "disabled";
304 };
305
Simon Glassb2c1cac2014-02-26 15:59:21 -0700[diff] [blame]306};
Przemyslaw Marczak77bee052015-05-13 13:38:35 +0200[diff] [blame]307
308#include "sandbox_pmic.dtsi"