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git01.mediatek.com / filogic / uboot / 4af17744de0ebea8718d3a7c712309f2474ced1e / . / arch / blackfin / include / asm / entry.h
blob: 98fe79c93caff1b79246baf29634e39720ab84c5 [file] [log] [blame]
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]1/*
Mike Frysinger66c4cf42008-02-04 19:26:55 -0500[diff] [blame]2 * entry.h - routines for context saving and restoring (for interrupts/exceptions)
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]3 *
Aubrey Li314d22f2007-04-05 18:31:18 +0800[diff] [blame]4 * Copyright (c) 2005-2007 Analog Devices Inc.
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]5 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +0200[diff] [blame]6 * SPDX-License-Identifier: GPL-2.0+
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]7 */
8
9#ifndef __BLACKFIN_ENTRY_H
10#define __BLACKFIN_ENTRY_H
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]11#ifdef __ASSEMBLY__
12
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]13#define SAVE_ALL_INT save_context_no_interrupts
14#define SAVE_ALL_SYS save_context_no_interrupts
15#define SAVE_CONTEXT save_context_with_interrupts
16
17#define RESTORE_ALL restore_context_no_interrupts
18#define RESTORE_ALL_SYS restore_context_no_interrupts
19#define RESTORE_CONTEXT restore_context_with_interrupts
20
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]21/*
22 * Code to save processor context.
23 * We even save the register which are preserved by a function call
24 * - r4, r5, r6, r7, p3, p4, p5
25 */
26.macro save_context_with_interrupts
27 [--sp] = R0;
28 [--sp] = ( R7:0, P5:0 );
29 [--sp] = fp;
30 [--sp] = usp;
31
32 [--sp] = i0;
33 [--sp] = i1;
34 [--sp] = i2;
35 [--sp] = i3;
36
37 [--sp] = m0;
38 [--sp] = m1;
39 [--sp] = m2;
40 [--sp] = m3;
41
42 [--sp] = l0;
43 [--sp] = l1;
44 [--sp] = l2;
45 [--sp] = l3;
46
47 [--sp] = b0;
48 [--sp] = b1;
49 [--sp] = b2;
50 [--sp] = b3;
51 [--sp] = a0.x;
52 [--sp] = a0.w;
53 [--sp] = a1.x;
54 [--sp] = a1.w;
55
56 [--sp] = LC0;
57 [--sp] = LC1;
58 [--sp] = LT0;
59 [--sp] = LT1;
60 [--sp] = LB0;
61 [--sp] = LB1;
62
63 [--sp] = ASTAT;
64
65 [--sp] = r0; /* Skip reserved */
66 [--sp] = RETS;
67 [--sp] = RETI;
68 [--sp] = RETX;
69 [--sp] = RETN;
70 [--sp] = RETE;
71 [--sp] = SEQSTAT;
72 [--sp] = SYSCFG;
Robin Getz230d0012009-12-21 16:35:48 -0500[diff] [blame]73#ifdef CONFIG_CMD_KGDB
74 p0.l = lo(IPEND)
75 p0.h = hi(IPEND)
76 r0 = [p0];
77#endif
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]78 [--sp] = r0; /* Skip IPEND as well. */
79.endm
80
81.macro save_context_no_interrupts
82 [--sp] = R0;
83 [--sp] = ( R7:0, P5:0 );
84 [--sp] = fp;
85 [--sp] = usp;
86
87 [--sp] = i0;
88 [--sp] = i1;
89 [--sp] = i2;
90 [--sp] = i3;
91
92 [--sp] = m0;
93 [--sp] = m1;
94 [--sp] = m2;
95 [--sp] = m3;
96
97 [--sp] = l0;
98 [--sp] = l1;
99 [--sp] = l2;
100 [--sp] = l3;
101
102 [--sp] = b0;
103 [--sp] = b1;
104 [--sp] = b2;
105 [--sp] = b3;
106 [--sp] = a0.x;
107 [--sp] = a0.w;
108 [--sp] = a1.x;
109 [--sp] = a1.w;
110
111 [--sp] = LC0;
112 [--sp] = LC1;
113 [--sp] = LT0;
114 [--sp] = LT1;
115 [--sp] = LB0;
116 [--sp] = LB1;
117
118 [--sp] = ASTAT;
119
120 [--sp] = r0; /* Skip reserved */
121 [--sp] = RETS;
122 r0 = RETI;
123 [--sp] = r0;
124 [--sp] = RETX;
125 [--sp] = RETN;
126 [--sp] = RETE;
127 [--sp] = SEQSTAT;
128 [--sp] = SYSCFG;
Robin Getz230d0012009-12-21 16:35:48 -0500[diff] [blame]129#ifdef CONFIG_CMD_KGDB
130 p0.l = lo(IPEND)
131 p0.h = hi(IPEND)
132 r0 = [p0];
133#endif
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]134 [--sp] = r0; /* Skip IPEND as well. */
135.endm
136
137.macro restore_context_no_interrupts
138 sp += 4;
139 SYSCFG = [sp++];
140 SEQSTAT = [sp++];
141 RETE = [sp++];
142 RETN = [sp++];
143 RETX = [sp++];
144 r0 = [sp++];
145 RETI = r0;
146 RETS = [sp++];
147
148 sp += 4;
149
150 ASTAT = [sp++];
151
152 LB1 = [sp++];
153 LB0 = [sp++];
154 LT1 = [sp++];
155 LT0 = [sp++];
156 LC1 = [sp++];
157 LC0 = [sp++];
158
159 a1.w = [sp++];
160 a1.x = [sp++];
161 a0.w = [sp++];
162 a0.x = [sp++];
163 b3 = [sp++];
164 b2 = [sp++];
165 b1 = [sp++];
166 b0 = [sp++];
167
168 l3 = [sp++];
169 l2 = [sp++];
170 l1 = [sp++];
171 l0 = [sp++];
172
173 m3 = [sp++];
174 m2 = [sp++];
175 m1 = [sp++];
176 m0 = [sp++];
177
178 i3 = [sp++];
179 i2 = [sp++];
180 i1 = [sp++];
181 i0 = [sp++];
182
183 sp += 4;
184 fp = [sp++];
185
186 ( R7 : 0, P5 : 0) = [ SP ++ ];
187 sp += 4;
188.endm
189
190.macro restore_context_with_interrupts
191 sp += 4;
192 SYSCFG = [sp++];
193 SEQSTAT = [sp++];
194 RETE = [sp++];
195 RETN = [sp++];
196 RETX = [sp++];
197 RETI = [sp++];
198 RETS = [sp++];
199
200 sp += 4;
201
202 ASTAT = [sp++];
203
204 LB1 = [sp++];
205 LB0 = [sp++];
206 LT1 = [sp++];
207 LT0 = [sp++];
208 LC1 = [sp++];
209 LC0 = [sp++];
210
211 a1.w = [sp++];
212 a1.x = [sp++];
213 a0.w = [sp++];
214 a0.x = [sp++];
215 b3 = [sp++];
216 b2 = [sp++];
217 b1 = [sp++];
218 b0 = [sp++];
219
220 l3 = [sp++];
221 l2 = [sp++];
222 l1 = [sp++];
223 l0 = [sp++];
224
225 m3 = [sp++];
226 m2 = [sp++];
227 m1 = [sp++];
228 m0 = [sp++];
229
230 i3 = [sp++];
231 i2 = [sp++];
232 i1 = [sp++];
233 i0 = [sp++];
234
235 sp += 4;
236 fp = [sp++];
237
238 ( R7 : 0, P5 : 0) = [ SP ++ ];
239 sp += 4;
240.endm
241
Wolfgang Denk97caf672006-03-12 02:12:27 +0100[diff] [blame]242#endif
Aubrey.Li9da597f2007-03-09 13:38:44 +0800[diff] [blame]243#endif