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git01.mediatek.com / filogic / uboot / 4a4ebe308448b62123703d49355feffe3f9b1590 / . / arch / arm / dts / keystone-k2e-evm.dts
blob: ed76e56369fcbe987b79118e5e693cd99b3e810c [file] [log] [blame]
Andrew Davis856ec342023-04-11 13:25:02 -0500[diff] [blame]1// SPDX-License-Identifier: GPL-2.0
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]2/*
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]3 * Keystone 2 Edison EVM device tree
4 *
Andrew Davis856ec342023-04-11 13:25:02 -0500[diff] [blame]5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]6 */
7/dts-v1/;
8
9#include "keystone.dtsi"
Lokesh Vutlae3187b92017-01-31 09:32:57 +0530[diff] [blame]10#include "keystone-k2e.dtsi"
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]11
12/ {
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]13 compatible = "ti,k2e-evm", "ti,k2e", "ti,keystone";
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]14 model = "Texas Instruments Keystone 2 Edison EVM";
15
16 soc {
17
18 clocks {
19 refclksys: refclksys {
20 #clock-cells = <0>;
21 compatible = "fixed-clock";
22 clock-frequency = <100000000>;
23 clock-output-names = "refclk-sys";
24 };
25
26 refclkpass: refclkpass {
27 #clock-cells = <0>;
28 compatible = "fixed-clock";
29 clock-frequency = <100000000>;
30 clock-output-names = "refclk-pass";
31 };
32
33 refclkddr3a: refclkddr3a {
34 #clock-cells = <0>;
35 compatible = "fixed-clock";
36 clock-frequency = <100000000>;
37 clock-output-names = "refclk-ddr3a";
38 };
39 };
40 };
41};
42
43&usb_phy {
44 status = "okay";
45};
46
47&usb {
48 status = "okay";
49};
50
51&usb1_phy {
52 status = "okay";
53};
54
55&usb1 {
56 status = "okay";
57};
58
59&i2c0 {
60 dtt@50 {
61 compatible = "at,24c1024";
62 reg = <0x50>;
63 };
64};
65
66&aemif {
67 cs0 {
68 #address-cells = <2>;
69 #size-cells = <1>;
70 clock-ranges;
71 ranges;
72
73 ti,cs-chipselect = <0>;
74 /* all timings in nanoseconds */
75 ti,cs-min-turnaround-ns = <12>;
76 ti,cs-read-hold-ns = <6>;
77 ti,cs-read-strobe-ns = <23>;
78 ti,cs-read-setup-ns = <9>;
79 ti,cs-write-hold-ns = <8>;
80 ti,cs-write-strobe-ns = <23>;
81 ti,cs-write-setup-ns = <8>;
82
83 nand@0,0 {
84 compatible = "ti,keystone-nand","ti,davinci-nand";
85 #address-cells = <1>;
86 #size-cells = <1>;
87 reg = <0 0 0x4000000
88 1 0 0x0000100>;
89
90 ti,davinci-chipselect = <0>;
91 ti,davinci-mask-ale = <0x2000>;
92 ti,davinci-mask-cle = <0x4000>;
93 ti,davinci-mask-chipsel = <0>;
94 nand-ecc-mode = "hw";
95 ti,davinci-ecc-bits = <4>;
96 nand-on-flash-bbt;
97
98 partition@0 {
99 label = "u-boot";
100 reg = <0x0 0x100000>;
101 read-only;
102 };
103
104 partition@100000 {
105 label = "params";
106 reg = <0x100000 0x80000>;
107 read-only;
108 };
109
110 partition@180000 {
111 label = "ubifs";
112 reg = <0x180000 0x1FE80000>;
113 };
114 };
115 };
116};
117
118&spi0 {
Vignesh R2ba906d2016-07-06 09:59:01 +0530[diff] [blame]119 status = "okay";
Andrew Davis33e399a2023-04-11 13:25:09 -0500[diff] [blame]120 nor_flash: flash@0 {
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]121 #address-cells = <1>;
122 #size-cells = <1>;
Neil Armstronga009fa72019-02-10 10:16:20 +0000[diff] [blame]123 compatible = "Micron,n25q128a11", "jedec,spi-nor";
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]124 spi-max-frequency = <54000000>;
125 m25p,fast-read;
126 reg = <0>;
127
128 partition@0 {
129 label = "u-boot-spl";
130 reg = <0x0 0x80000>;
131 read-only;
132 };
133
134 partition@1 {
135 label = "misc";
136 reg = <0x80000 0xf80000>;
137 };
138 };
139};
140
141&mdio {
Roger Quadros0ffbc742021-08-24 14:07:27 +0300[diff] [blame]142 status = "okay";
Lokesh Vutla2c14c642015-09-19 15:00:22 +0530[diff] [blame]143 ethphy0: ethernet-phy@0 {
144 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
145 reg = <0>;
146 };
147
148 ethphy1: ethernet-phy@1 {
149 compatible = "marvell,88E1514", "marvell,88E1510", "ethernet-phy-ieee802.3-c22";
150 reg = <1>;
151 };
152};