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Samuel Holland26bc4e72020-10-24 10:21:55 -05001// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2// Copyright (C) 2017 Jagan Teki <jteki@openedev.com>
Jagan Tekic9a4d0a2017-06-09 18:31:17 +05303
4/dts-v1/;
5
6#include "sun50i-a64.dtsi"
Samuel Holland26bc4e72020-10-24 10:21:55 -05007#include "sun50i-a64-cpu-opp.dtsi"
Jagan Tekic9a4d0a2017-06-09 18:31:17 +05308
9#include <dt-bindings/gpio/gpio.h>
10
11/ {
12 model = "FriendlyARM NanoPi A64";
13 compatible = "friendlyarm,nanopi-a64", "allwinner,sun50i-a64";
14
15 aliases {
Andre Przywara9607c052018-10-29 00:56:47 +000016 ethernet0 = &emac;
Jagan Tekic9a4d0a2017-06-09 18:31:17 +053017 serial0 = &uart0;
18 };
19
20 chosen {
21 stdout-path = "serial0:115200n8";
22 };
Andre Przywara9607c052018-10-29 00:56:47 +000023
24 hdmi-connector {
25 compatible = "hdmi-connector";
26 type = "a";
27
28 port {
29 hdmi_con_in: endpoint {
30 remote-endpoint = <&hdmi_out_con>;
31 };
32 };
33 };
34
35 leds {
36 compatible = "gpio-leds";
37
Andre Przywarafb675472021-04-17 22:55:19 +010038 led {
Andre Przywara9607c052018-10-29 00:56:47 +000039 label = "nanopi-a64:blue:status";
40 gpios = <&pio 3 24 GPIO_ACTIVE_LOW>; /* PD24 */
41 };
42 };
43
44 wifi_pwrseq: wifi_pwrseq {
45 compatible = "mmc-pwrseq-simple";
Andre Przywara5eb4bbe2022-09-11 00:04:41 +010046 clocks = <&rtc CLK_OSC32K_FANOUT>;
Andre Przywara9607c052018-10-29 00:56:47 +000047 clock-names = "ext_clock";
48 reset-gpios = <&r_pio 0 2 GPIO_ACTIVE_LOW>; /* PL2 */
49 };
Jagan Tekic9a4d0a2017-06-09 18:31:17 +053050};
51
Samuel Holland26bc4e72020-10-24 10:21:55 -050052&cpu0 {
53 cpu-supply = <&reg_dcdc2>;
54};
55
56&cpu1 {
57 cpu-supply = <&reg_dcdc2>;
58};
59
60&cpu2 {
61 cpu-supply = <&reg_dcdc2>;
62};
63
64&cpu3 {
65 cpu-supply = <&reg_dcdc2>;
66};
67
Andre Przywara9607c052018-10-29 00:56:47 +000068&de {
69 status = "okay";
70};
71
Jagan Tekic9a4d0a2017-06-09 18:31:17 +053072&ehci0 {
73 status = "okay";
74};
75
76&ehci1 {
77 status = "okay";
78};
79
Andre Przywara9607c052018-10-29 00:56:47 +000080&emac {
81 pinctrl-names = "default";
82 pinctrl-0 = <&rgmii_pins>;
83 phy-mode = "rgmii";
84 phy-handle = <&ext_rgmii_phy>;
85 phy-supply = <&reg_dcdc1>;
86 status = "okay";
87};
88
89&hdmi {
90 hvcc-supply = <&reg_dldo1>;
91 status = "okay";
92};
93
94&hdmi_out {
95 hdmi_out_con: endpoint {
96 remote-endpoint = <&hdmi_con_in>;
97 };
98};
99
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530100/* i2c1 connected with gpio headers like pine64, bananapi */
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530101&i2c1_pins {
102 bias-pull-up;
103};
104
Andre Przywara9607c052018-10-29 00:56:47 +0000105&mdio {
106 ext_rgmii_phy: ethernet-phy@1 {
107 compatible = "ethernet-phy-ieee802.3-c22";
108 reg = <7>;
109 };
110};
111
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530112&mmc0 {
113 pinctrl-names = "default";
114 pinctrl-0 = <&mmc0_pins>;
Andre Przywara0fcb8302018-07-04 14:16:35 +0100115 vmmc-supply = <&reg_dcdc1>;
116 cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>;
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530117 disable-wp;
118 bus-width = <4>;
119 status = "okay";
120};
121
Andre Przywara9607c052018-10-29 00:56:47 +0000122&mmc1 {
123 pinctrl-names = "default";
124 pinctrl-0 = <&mmc1_pins>;
125 vmmc-supply = <&reg_dcdc1>;
126 vqmmc-supply = <&reg_dldo4>;
127 mmc-pwrseq = <&wifi_pwrseq>;
128 bus-width = <4>;
129 non-removable;
130 status = "okay";
131
132 rtl8189etv: wifi@1 {
133 reg = <1>;
134 interrupt-parent = <&r_pio>;
135 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* PL3 */
136 interrupt-names = "host-wake";
137 };
138};
139
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530140&ohci0 {
141 status = "okay";
142};
143
144&ohci1 {
145 status = "okay";
Andre Przywara0fcb8302018-07-04 14:16:35 +0100146};
147
148&r_rsb {
149 status = "okay";
150
151 axp803: pmic@3a3 {
152 compatible = "x-powers,axp803";
153 reg = <0x3a3>;
154 interrupt-parent = <&r_intc>;
155 interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
156 };
157};
158
159#include "axp803.dtsi"
160
Samuel Holland26bc4e72020-10-24 10:21:55 -0500161&ac_power_supply {
162 status = "okay";
163};
164
Andre Przywara0fcb8302018-07-04 14:16:35 +0100165&reg_aldo2 {
166 regulator-always-on;
167 regulator-min-microvolt = <1800000>;
168 regulator-max-microvolt = <3300000>;
169 regulator-name = "vcc-pl";
170};
171
172&reg_aldo3 {
173 regulator-always-on;
174 regulator-min-microvolt = <3000000>;
175 regulator-max-microvolt = <3000000>;
176 regulator-name = "vcc-pll-avcc";
177};
178
179&reg_dcdc1 {
180 regulator-always-on;
Andre Przywara9607c052018-10-29 00:56:47 +0000181 regulator-min-microvolt = <3300000>;
182 regulator-max-microvolt = <3300000>;
183 regulator-name = "vcc-3v3";
Andre Przywara0fcb8302018-07-04 14:16:35 +0100184};
185
186&reg_dcdc2 {
187 regulator-always-on;
188 regulator-min-microvolt = <1040000>;
189 regulator-max-microvolt = <1300000>;
190 regulator-name = "vdd-cpux";
191};
192
193/* DCDC3 is polyphased with DCDC2 */
194
195&reg_dcdc5 {
196 regulator-always-on;
197 regulator-min-microvolt = <1500000>;
198 regulator-max-microvolt = <1500000>;
199 regulator-name = "vcc-dram";
200};
201
202&reg_dcdc6 {
203 regulator-always-on;
204 regulator-min-microvolt = <1100000>;
205 regulator-max-microvolt = <1100000>;
206 regulator-name = "vdd-sys";
207};
208
209&reg_dldo1 {
210 regulator-always-on;
211 regulator-min-microvolt = <3300000>;
212 regulator-max-microvolt = <3300000>;
213 regulator-name = "vcc-hdmi-dsi";
214};
215
216&reg_dldo4 {
217 regulator-always-on;
218 regulator-min-microvolt = <3000000>;
219 regulator-max-microvolt = <3000000>;
220 regulator-name = "vcc-pg-wifi-io";
221};
222
223&reg_eldo1 {
224 regulator-min-microvolt = <1800000>;
225 regulator-max-microvolt = <1800000>;
226 regulator-name = "cpvdd";
227};
228
229&reg_fldo1 {
230 regulator-min-microvolt = <1200000>;
231 regulator-max-microvolt = <1200000>;
232 regulator-name = "vcc-1v2-hsic";
233};
234
235/*
236 * The A64 chip cannot work without this regulator off, although
237 * it seems to be only driving the AR100 core.
238 * Maybe we don't still know well about CPUs domain.
239 */
240&reg_fldo2 {
241 regulator-always-on;
242 regulator-min-microvolt = <1100000>;
243 regulator-max-microvolt = <1100000>;
244 regulator-name = "vdd-cpus";
245};
246
247&reg_rtc_ldo {
248 regulator-name = "vcc-rtc";
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530249};
250
Andre Przywara9607c052018-10-29 00:56:47 +0000251&simplefb_hdmi {
252 vcc-hdmi-supply = <&reg_dldo1>;
253};
254
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530255&uart0 {
256 pinctrl-names = "default";
Andre Przywara9607c052018-10-29 00:56:47 +0000257 pinctrl-0 = <&uart0_pb_pins>;
Jagan Tekic9a4d0a2017-06-09 18:31:17 +0530258 status = "okay";
259};
260
261&usbphy {
262 status = "okay";
263};