blob: 53046a2110ed6fc68503efc286a354ddabebd5f8 [file] [log] [blame]
Hao Zhangeb01de22014-07-09 23:44:48 +03001/*
2 * Common configuration header file for all Keystone II EVM platforms
3 *
4 * (C) Copyright 2012-2014
5 * Texas Instruments Incorporated, <www.ti.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9
10#ifndef __CONFIG_KS2_EVM_H
11#define __CONFIG_KS2_EVM_H
12
13#define CONFIG_SOC_KEYSTONE
14
15/* U-Boot Build Configuration */
16#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage loader */
Hao Zhangeb01de22014-07-09 23:44:48 +030017
18/* SoC Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +030019#define CONFIG_ARCH_CPU_INIT
20#define CONFIG_SYS_ARCH_TIMER
Vitaly Andrianove64fb292016-03-28 15:15:59 -040021#ifndef CONFIG_SYS_TEXT_BASE
Lokesh Vutla736bb5a2015-08-17 19:54:48 +053022#define CONFIG_SYS_TEXT_BASE 0x0c000000
Vitaly Andrianove64fb292016-03-28 15:15:59 -040023#endif
Hao Zhangeb01de22014-07-09 23:44:48 +030024#define CONFIG_SPL_TARGET "u-boot-spi.gph"
25#define CONFIG_SYS_DCACHE_OFF
26
27/* Memory Configuration */
28#define CONFIG_NR_DRAM_BANKS 2
Hao Zhangeb01de22014-07-09 23:44:48 +030029#define CONFIG_SYS_LPAE_SDRAM_BASE 0x800000000
30#define CONFIG_MAX_RAM_BANK_SIZE (2 << 30) /* 2GB */
Lokesh Vutla736bb5a2015-08-17 19:54:48 +053031#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SPL_TEXT_BASE - \
Hao Zhangeb01de22014-07-09 23:44:48 +030032 GENERATED_GBL_DATA_SIZE)
33
Lokesh Vutlae0208612015-09-19 15:00:17 +053034#ifdef CONFIG_SYS_MALLOC_F_LEN
35#define SPL_MALLOC_F_SIZE CONFIG_SYS_MALLOC_F_LEN
36#else
37#define SPL_MALLOC_F_SIZE 0
38#endif
39
Hao Zhangeb01de22014-07-09 23:44:48 +030040/* SPL SPI Loader Configuration */
41#define CONFIG_SPL_PAD_TO 65536
42#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_PAD_TO - 8)
43#define CONFIG_SPL_BSS_START_ADDR (CONFIG_SPL_TEXT_BASE + \
44 CONFIG_SPL_MAX_SIZE)
45#define CONFIG_SPL_BSS_MAX_SIZE (32 * 1024)
46#define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
47 CONFIG_SPL_BSS_MAX_SIZE)
48#define CONFIG_SYS_SPL_MALLOC_SIZE (32 * 1024)
Phil Edworthy4f91f362017-02-03 12:31:46 +000049#define KEYSTONE_SPL_STACK_SIZE (8 * 1024)
Hao Zhangeb01de22014-07-09 23:44:48 +030050#define CONFIG_SPL_STACK (CONFIG_SYS_SPL_MALLOC_START + \
51 CONFIG_SYS_SPL_MALLOC_SIZE + \
Lokesh Vutlae0208612015-09-19 15:00:17 +053052 SPL_MALLOC_F_SIZE + \
Phil Edworthy4f91f362017-02-03 12:31:46 +000053 KEYSTONE_SPL_STACK_SIZE - 4)
Hao Zhangeb01de22014-07-09 23:44:48 +030054#define CONFIG_SPL_SPI_LOAD
Hao Zhangeb01de22014-07-09 23:44:48 +030055#define CONFIG_SYS_SPI_U_BOOT_OFFS CONFIG_SPL_PAD_TO
Hao Zhangeb01de22014-07-09 23:44:48 +030056
Franklin S Cooper Jr29f73132017-03-13 15:04:26 +020057/* SRAM scratch space entries */
58#define SRAM_SCRATCH_SPACE_ADDR CONFIG_SPL_STACK + 0x8
59
60#define TI_SRAM_SCRATCH_BOARD_EEPROM_START (SRAM_SCRATCH_SPACE_ADDR)
61#define TI_SRAM_SCRATCH_BOARD_EEPROM_END (SRAM_SCRATCH_SPACE_ADDR + 0x200)
62#define KEYSTONE_SRAM_SCRATCH_SPACE_END (TI_SRAM_SCRATCH_BOARD_EEPROM_END)
63
Hao Zhangeb01de22014-07-09 23:44:48 +030064/* UART Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +030065#define CONFIG_SYS_NS16550_MEM32
Lokesh Vutla050d8ab2015-09-19 15:00:20 +053066#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
67#define CONFIG_SYS_NS16550_SERIAL
Hao Zhangeb01de22014-07-09 23:44:48 +030068#define CONFIG_SYS_NS16550_REG_SIZE -4
Lokesh Vutla050d8ab2015-09-19 15:00:20 +053069#endif
Hao Zhangeb01de22014-07-09 23:44:48 +030070#define CONFIG_SYS_NS16550_COM1 KS2_UART0_BASE
71#define CONFIG_SYS_NS16550_COM2 KS2_UART1_BASE
Hao Zhangeb01de22014-07-09 23:44:48 +030072#define CONFIG_CONS_INDEX 1
Hao Zhangeb01de22014-07-09 23:44:48 +030073
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +053074#ifndef CONFIG_SOC_K2G
Masahiro Yamadaf576ecf2016-09-26 20:45:26 +090075#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(KS2_CLK1_6)
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +053076#else
Masahiro Yamadaf576ecf2016-09-26 20:45:26 +090077#define CONFIG_SYS_NS16550_CLK ks_clk_get_rate(uart_pll_clk) / 2
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +053078#endif
79
Hao Zhangeb01de22014-07-09 23:44:48 +030080/* SPI Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +030081#define CONFIG_DAVINCI_SPI
Masahiro Yamadaf576ecf2016-09-26 20:45:26 +090082#define CONFIG_SYS_SPI_CLK ks_clk_get_rate(KS2_CLK1_6)
Hao Zhangeb01de22014-07-09 23:44:48 +030083#define CONFIG_SF_DEFAULT_SPEED 30000000
84#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
85#define CONFIG_SYS_SPI0
86#define CONFIG_SYS_SPI_BASE KS2_SPI0_BASE
87#define CONFIG_SYS_SPI0_NUM_CS 4
88#define CONFIG_SYS_SPI1
89#define CONFIG_SYS_SPI1_BASE KS2_SPI1_BASE
90#define CONFIG_SYS_SPI1_NUM_CS 4
91#define CONFIG_SYS_SPI2
92#define CONFIG_SYS_SPI2_BASE KS2_SPI2_BASE
93#define CONFIG_SYS_SPI2_NUM_CS 4
Vignesh Rbe70c202016-07-06 09:58:57 +053094#ifdef CONFIG_SPL_BUILD
95#undef CONFIG_DM_SPI
96#undef CONFIG_DM_SPI_FLASH
97#endif
Hao Zhangeb01de22014-07-09 23:44:48 +030098
99/* Network Configuration */
Khoronzhuk, Ivan39cd9f02014-10-17 20:44:35 +0300100#define CONFIG_PHY_MARVELL
Hao Zhangeb01de22014-07-09 23:44:48 +0300101#define CONFIG_MII
102#define CONFIG_BOOTP_DEFAULT
103#define CONFIG_BOOTP_DNS
104#define CONFIG_BOOTP_DNS2
105#define CONFIG_BOOTP_SEND_HOSTNAME
106#define CONFIG_NET_RETRY_COUNT 32
Hao Zhangeb01de22014-07-09 23:44:48 +0300107#define CONFIG_SYS_SGMII_REFCLK_MHZ 312
108#define CONFIG_SYS_SGMII_LINERATE_MHZ 1250
109#define CONFIG_SYS_SGMII_RATESCALE 2
110
Khoronzhuk, Ivan7954b862014-09-05 19:02:47 +0300111/* Keyston Navigator Configuration */
Hao Zhang7874b8a2014-10-29 13:09:34 +0200112#define CONFIG_TI_KSNAV
Khoronzhuk, Ivan7954b862014-09-05 19:02:47 +0300113#define CONFIG_KSNAV_QM_BASE_ADDRESS KS2_QM_BASE_ADDRESS
114#define CONFIG_KSNAV_QM_CONF_BASE KS2_QM_CONF_BASE
115#define CONFIG_KSNAV_QM_DESC_SETUP_BASE KS2_QM_DESC_SETUP_BASE
116#define CONFIG_KSNAV_QM_STATUS_RAM_BASE KS2_QM_STATUS_RAM_BASE
117#define CONFIG_KSNAV_QM_INTD_CONF_BASE KS2_QM_INTD_CONF_BASE
118#define CONFIG_KSNAV_QM_PDSP1_CMD_BASE KS2_QM_PDSP1_CMD_BASE
119#define CONFIG_KSNAV_QM_PDSP1_CTRL_BASE KS2_QM_PDSP1_CTRL_BASE
120#define CONFIG_KSNAV_QM_PDSP1_IRAM_BASE KS2_QM_PDSP1_IRAM_BASE
121#define CONFIG_KSNAV_QM_MANAGER_QUEUES_BASE KS2_QM_MANAGER_QUEUES_BASE
122#define CONFIG_KSNAV_QM_MANAGER_Q_PROXY_BASE KS2_QM_MANAGER_Q_PROXY_BASE
123#define CONFIG_KSNAV_QM_QUEUE_STATUS_BASE KS2_QM_QUEUE_STATUS_BASE
124#define CONFIG_KSNAV_QM_LINK_RAM_BASE KS2_QM_LINK_RAM_BASE
125#define CONFIG_KSNAV_QM_REGION_NUM KS2_QM_REGION_NUM
126#define CONFIG_KSNAV_QM_QPOOL_NUM KS2_QM_QPOOL_NUM
127
128/* NETCP pktdma */
Hao Zhang7874b8a2014-10-29 13:09:34 +0200129#define CONFIG_KSNAV_PKTDMA_NETCP
Khoronzhuk, Ivan7954b862014-09-05 19:02:47 +0300130#define CONFIG_KSNAV_NETCP_PDMA_CTRL_BASE KS2_NETCP_PDMA_CTRL_BASE
131#define CONFIG_KSNAV_NETCP_PDMA_TX_BASE KS2_NETCP_PDMA_TX_BASE
132#define CONFIG_KSNAV_NETCP_PDMA_TX_CH_NUM KS2_NETCP_PDMA_TX_CH_NUM
133#define CONFIG_KSNAV_NETCP_PDMA_RX_BASE KS2_NETCP_PDMA_RX_BASE
134#define CONFIG_KSNAV_NETCP_PDMA_RX_CH_NUM KS2_NETCP_PDMA_RX_CH_NUM
135#define CONFIG_KSNAV_NETCP_PDMA_SCHED_BASE KS2_NETCP_PDMA_SCHED_BASE
136#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_BASE KS2_NETCP_PDMA_RX_FLOW_BASE
137#define CONFIG_KSNAV_NETCP_PDMA_RX_FLOW_NUM KS2_NETCP_PDMA_RX_FLOW_NUM
138#define CONFIG_KSNAV_NETCP_PDMA_RX_FREE_QUEUE KS2_NETCP_PDMA_RX_FREE_QUEUE
139#define CONFIG_KSNAV_NETCP_PDMA_RX_RCV_QUEUE KS2_NETCP_PDMA_RX_RCV_QUEUE
140#define CONFIG_KSNAV_NETCP_PDMA_TX_SND_QUEUE KS2_NETCP_PDMA_TX_SND_QUEUE
141
Khoronzhuk, Ivanf2c13ba2014-09-29 22:17:22 +0300142/* Keystone net */
Hao Zhang7874b8a2014-10-29 13:09:34 +0200143#define CONFIG_DRIVER_TI_KEYSTONE_NET
Hao Zhangd890dff2014-10-22 17:18:23 +0300144#define CONFIG_KSNET_MAC_ID_BASE KS2_MAC_ID_BASE_ADDR
145#define CONFIG_KSNET_NETCP_BASE KS2_NETCP_BASE
146#define CONFIG_KSNET_SERDES_SGMII_BASE KS2_SGMII_SERDES_BASE
Khoronzhuk, Ivan3df3e632014-10-17 21:01:13 +0300147#define CONFIG_KSNET_SERDES_SGMII2_BASE KS2_SGMII_SERDES2_BASE
Hao Zhangd890dff2014-10-22 17:18:23 +0300148#define CONFIG_KSNET_SERDES_LANES_PER_SGMII KS2_LANES_PER_SGMII_SERDES
Khoronzhuk, Ivanf2c13ba2014-09-29 22:17:22 +0300149
Khoronzhuk, Ivan53eae4a2014-10-29 13:09:32 +0200150/* SerDes */
151#define CONFIG_TI_KEYSTONE_SERDES
152
Hao Zhangeb01de22014-07-09 23:44:48 +0300153#define CONFIG_AEMIF_CNTRL_BASE KS2_AEMIF_CNTRL_BASE
154
155/* I2C Configuration */
Hao Zhangeb01de22014-07-09 23:44:48 +0300156#define CONFIG_SYS_I2C_DAVINCI
157#define CONFIG_SYS_DAVINCI_I2C_SPEED 100000
158#define CONFIG_SYS_DAVINCI_I2C_SLAVE 0x10 /* SMBus host address */
159#define CONFIG_SYS_DAVINCI_I2C_SPEED1 100000
160#define CONFIG_SYS_DAVINCI_I2C_SLAVE1 0x10 /* SMBus host address */
161#define CONFIG_SYS_DAVINCI_I2C_SPEED2 100000
162#define CONFIG_SYS_DAVINCI_I2C_SLAVE2 0x10 /* SMBus host address */
Hao Zhangeb01de22014-07-09 23:44:48 +0300163
164/* EEPROM definitions */
Hao Zhangeb01de22014-07-09 23:44:48 +0300165#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
166#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
167#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
168#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
169#define CONFIG_ENV_EEPROM_IS_ON_I2C
170
171/* NAND Configuration */
172#define CONFIG_NAND_DAVINCI
173#define CONFIG_KEYSTONE_RBL_NAND
174#define CONFIG_KEYSTONE_NAND_MAX_RBL_SIZE CONFIG_ENV_OFFSET
175#define CONFIG_SYS_NAND_MASK_CLE 0x4000
176#define CONFIG_SYS_NAND_MASK_ALE 0x2000
177#define CONFIG_SYS_NAND_CS 2
178#define CONFIG_SYS_NAND_USE_FLASH_BBT
179#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
180
181#define CONFIG_SYS_NAND_LARGEPAGE
182#define CONFIG_SYS_NAND_BASE_LIST { 0x30000000, }
183#define CONFIG_SYS_MAX_NAND_DEVICE 1
184#define CONFIG_SYS_NAND_MAX_CHIPS 1
185#define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
Hao Zhangeb01de22014-07-09 23:44:48 +0300186#define CONFIG_MTD_PARTITIONS
Hao Zhangeb01de22014-07-09 23:44:48 +0300187#define MTDIDS_DEFAULT "nand0=davinci_nand.0"
188#define MTDPARTS_DEFAULT "mtdparts=davinci_nand.0:" \
189 "1024k(bootloader)ro,512k(params)ro," \
190 "-(ubifs)"
191
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300192/* USB Configuration */
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300193#define CONFIG_USB_XHCI_KEYSTONE
WingMan Kwok66c5b9f2014-09-05 22:26:23 +0300194#define CONFIG_USB_SS_BASE KS2_USB_SS_BASE
195#define CONFIG_USB_HOST_XHCI_BASE KS2_USB_HOST_XHCI_BASE
196#define CONFIG_DEV_USB_PHY_BASE KS2_DEV_USB_PHY_BASE
197#define CONFIG_USB_PHY_CFG_BASE KS2_USB_PHY_CFG_BASE
198
Hao Zhangeb01de22014-07-09 23:44:48 +0300199/* U-Boot general configuration */
Khoronzhuk, Ivand0553052014-09-26 15:42:30 +0300200#define CONFIG_MISC_INIT_R
Hao Zhangeb01de22014-07-09 23:44:48 +0300201#define CONFIG_MX_CYCLIC
Hao Zhangeb01de22014-07-09 23:44:48 +0300202#define CONFIG_TIMESTAMP
203
204/* EDMA3 */
205#define CONFIG_TI_EDMA3
206
Vignesh R194c9932017-03-08 13:58:17 +0530207#define KERNEL_MTD_PARTS \
208 "mtdparts=" \
209 SPI_MTD_PARTS
210
Murali Karichericead0b22016-03-09 15:39:38 +0530211#define DEFAULT_FW_INITRAMFS_BOOT_ENV \
212 "name_fw_rd=k2-fw-initrd.cpio.gz\0" \
213 "set_rd_spec=setenv rd_spec ${rdaddr}:${filesize}\0" \
214 "init_fw_rd_net=dhcp ${rdaddr} ${tftp_root}/${name_fw_rd}; " \
215 "run set_rd_spec\0" \
Andrew F. Davis8593ed92016-11-18 11:56:16 -0600216 "init_fw_rd_nfs=nfs ${rdaddr} ${nfs_root}/boot/${name_fw_rd}; " \
217 "run set_rd_spec\0" \
Murali Karichericead0b22016-03-09 15:39:38 +0530218 "init_fw_rd_ramfs=setenv rd_spec -\0" \
219 "init_fw_rd_ubi=ubifsload ${rdaddr} ${bootdir}/${name_fw_rd}; " \
220 "run set_rd_spec\0" \
221
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600222#define DEFAULT_PMMC_BOOT_ENV \
223 "set_name_pmmc=setenv name_pmmc ti-sci-firmware-${soc_variant}.bin\0" \
224 "dev_pmmc=0\0" \
225 "get_pmmc_net=dhcp ${loadaddr} ${tftp_root}/${name_pmmc}\0" \
Andrew F. Davis8593ed92016-11-18 11:56:16 -0600226 "get_pmmc_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_pmmc}\0" \
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600227 "get_pmmc_ramfs=run get_pmmc_net\0" \
228 "get_pmmc_mmc=load mmc ${bootpart} ${loadaddr} " \
229 "${bootdir}/${name_pmmc}\0" \
230 "get_pmmc_ubi=ubifsload ${loadaddr} ${bootdir}/${name_pmmc}\0" \
231 "run_pmmc=rproc init; rproc list; " \
232 "rproc load ${dev_pmmc} ${loadaddr} 0x${filesize}; " \
233 "rproc start ${dev_pmmc}\0" \
234
Hao Zhangeb01de22014-07-09 23:44:48 +0300235#define CONFIG_EXTRA_ENV_SETTINGS \
Nishanth Menona1218962015-07-22 18:05:46 -0500236 DEFAULT_LINUX_BOOT_ENV \
Murali Karicheri449c3a62014-11-04 16:52:34 +0200237 CONFIG_EXTRA_ENV_KS2_BOARD_SETTINGS \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530238 "bootdir=/boot\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300239 "tftp_root=/\0" \
240 "nfs_root=/export\0" \
241 "mem_lpae=1\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300242 "addr_ubi=0x82000000\0" \
243 "addr_secdb_key=0xc000000\0" \
Nishanth Menonfdbfb192015-07-22 18:05:47 -0500244 "name_kern=zImage\0" \
Lokesh Vutlae89428b2016-09-16 10:17:53 +0530245 "addr_mon=0x87000000\0" \
Madan Srinivas5a32f7c2017-07-17 12:59:13 -0500246 "addr_non_sec_mon=0x0c087fc0\0" \
247 "addr_load_sec_bm=0x0c08c000\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300248 "run_mon=mon_install ${addr_mon}\0" \
Madan Srinivas5a32f7c2017-07-17 12:59:13 -0500249 "run_mon_hs=mon_install ${addr_non_sec_mon} " \
250 "${addr_load_sec_bm}\0" \
Murali Karichericead0b22016-03-09 15:39:38 +0530251 "run_kern=bootz ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300252 "init_net=run args_all args_net\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600253 "init_nfs=setenv autoload no; dhcp; run args_all args_net\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300254 "init_ubi=run args_all args_ubi; " \
Carlos Hernandezd45e7602016-03-09 15:39:32 +0530255 "ubi part ubifs; ubifsmount ubi:rootfs;\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500256 "get_fdt_net=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600257 "get_fdt_nfs=nfs ${fdtaddr} ${nfs_root}/boot/${name_fdt}\0" \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530258 "get_fdt_ubi=ubifsload ${fdtaddr} ${bootdir}/${name_fdt}\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500259 "get_kern_net=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600260 "get_kern_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_kern}\0" \
Carlos Hernandez060a3982016-03-09 15:39:31 +0530261 "get_kern_ubi=ubifsload ${loadaddr} ${bootdir}/${name_kern}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300262 "get_mon_net=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600263 "get_mon_nfs=nfs ${addr_mon} ${nfs_root}/boot/${name_mon}\0" \
Andrew F. Davisdd940712017-07-17 12:59:12 -0500264 "get_mon_ubi=ubifsload ${addr_mon} ${bootdir}/${name_mon}\0" \
265 "get_fit_net=dhcp ${fit_loadaddr} ${tftp_root}" \
266 "/${fit_bootfile}\0" \
267 "get_fit_nfs=nfs ${fit_loadaddr} ${nfs_root}/boot/${fit_bootfile}\0"\
268 "get_fit_ubi=ubifsload ${fit_loadaddr} ${bootdir}/${fit_bootfile}\0"\
269 "get_fit_mmc=load mmc ${bootpart} ${fit_loadaddr} " \
270 "${bootdir}/${fit_bootfile}\0" \
Vitaly Andrianov200eecd2015-08-03 15:54:32 -0400271 "get_uboot_net=dhcp ${loadaddr} ${tftp_root}/${name_uboot}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600272 "get_uboot_nfs=nfs ${loadaddr} ${nfs_root}/boot/${name_uboot}\0" \
Lokesh Vutla49b3c792017-09-21 07:31:13 +0530273 "burn_uboot_spi=sf probe; sf erase 0 0x90000; " \
Vitaly Andrianov200eecd2015-08-03 15:54:32 -0400274 "sf write ${loadaddr} 0 ${filesize}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300275 "burn_uboot_nand=nand erase 0 0x100000; " \
Vitaly Andrianov200eecd2015-08-03 15:54:32 -0400276 "nand write ${loadaddr} 0 ${filesize}\0" \
Vignesh R194c9932017-03-08 13:58:17 +0530277 "args_all=setenv bootargs console=ttyS0,115200n8 rootwait=1 " \
278 KERNEL_MTD_PARTS \
Hao Zhangeb01de22014-07-09 23:44:48 +0300279 "args_net=setenv bootargs ${bootargs} rootfstype=nfs " \
280 "root=/dev/nfs rw nfsroot=${serverip}:${nfs_root}," \
281 "${nfs_options} ip=dhcp\0" \
282 "nfs_options=v3,tcp,rsize=4096,wsize=4096\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500283 "get_fdt_ramfs=dhcp ${fdtaddr} ${tftp_root}/${name_fdt}\0" \
284 "get_kern_ramfs=dhcp ${loadaddr} ${tftp_root}/${name_kern}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300285 "get_mon_ramfs=dhcp ${addr_mon} ${tftp_root}/${name_mon}\0" \
Andrew F. Davisdd940712017-07-17 12:59:12 -0500286 "get_fit_ramfs=dhcp ${fit_loadaddr} ${tftp_root}" \
287 "/${fit_bootfile}\0" \
Nishanth Menona1218962015-07-22 18:05:46 -0500288 "get_fs_ramfs=dhcp ${rdaddr} ${tftp_root}/${name_fs}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300289 "get_ubi_net=dhcp ${addr_ubi} ${tftp_root}/${name_ubi}\0" \
Andrew F. Davis25fd7272016-03-11 15:04:03 -0600290 "get_ubi_nfs=nfs ${addr_ubi} ${nfs_root}/boot/${name_ubi}\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300291 "burn_ubi=nand erase.part ubifs; " \
292 "nand write ${addr_ubi} ubifs ${filesize}\0" \
293 "init_ramfs=run args_all args_ramfs get_fs_ramfs\0" \
294 "args_ramfs=setenv bootargs ${bootargs} " \
295 "rdinit=/sbin/init rw root=/dev/ram0 " \
Vitaly Andrianovef010d72015-08-04 11:16:16 -0400296 "initrd=0x808080000,80M\0" \
Hao Zhangeb01de22014-07-09 23:44:48 +0300297 "no_post=1\0" \
298 "mtdparts=mtdparts=davinci_nand.0:" \
299 "1024k(bootloader)ro,512k(params)ro,-(ubifs)\0"
300
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600301#ifndef CONFIG_BOOTCOMMAND
Madan Srinivas5a32f7c2017-07-17 12:59:13 -0500302#ifndef CONFIG_TI_SECURE_DEVICE
Hao Zhangeb01de22014-07-09 23:44:48 +0300303#define CONFIG_BOOTCOMMAND \
Andrew F. Davisd354c042017-07-17 12:59:14 -0500304 "run init_${boot}; " \
305 "run get_mon_${boot} run_mon; " \
306 "run get_kern_${boot}; " \
307 "run init_fw_rd_${boot}; " \
308 "run get_fdt_${boot}; " \
309 "run run_kern"
Madan Srinivas5a32f7c2017-07-17 12:59:13 -0500310#else
311#define CONFIG_BOOTCOMMAND \
Andrew F. Davisd354c042017-07-17 12:59:14 -0500312 "run run_mon_hs; " \
313 "run init_${boot}; " \
314 "run get_fit_${boot}; " \
315 "bootm ${fit_loadaddr}#${name_fdt}"
Madan Srinivas5a32f7c2017-07-17 12:59:13 -0500316#endif
Nishanth Menon0ce0a252016-02-25 12:53:47 -0600317#endif
Hao Zhangeb01de22014-07-09 23:44:48 +0300318
Nishanth Menonb4471512015-07-22 18:05:45 -0500319/* Now for the remaining common defines */
320#include <configs/ti_armv7_common.h>
321
Hao Zhangeb01de22014-07-09 23:44:48 +0300322/* we may include files below only after all above definitions */
323#include <asm/arch/hardware.h>
324#include <asm/arch/clock.h>
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +0530325#ifndef CONFIG_SOC_K2G
Masahiro Yamadaf576ecf2016-09-26 20:45:26 +0900326#define CONFIG_SYS_HZ_CLOCK ks_clk_get_rate(KS2_CLK1_6)
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +0530327#else
Lokesh Vutlaa9a0e122017-05-03 16:58:26 +0530328#define CONFIG_SYS_HZ_CLOCK get_external_clk(sys_clk)
Vitaly Andrianov7fd5b642015-09-19 16:26:41 +0530329#endif
Hao Zhangeb01de22014-07-09 23:44:48 +0300330
Hao Zhangeb01de22014-07-09 23:44:48 +0300331#endif /* __CONFIG_KS2_EVM_H */