blob: 39878d9dce9f7b64a8716856cba0debdd6f6f5c9 [file] [log] [blame]
Jagan Teki1e097442018-08-05 00:40:09 +05301/*
2 * Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This file is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This file is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43#ifndef _DT_BINDINGS_CLK_SUN6I_A31_H_
44#define _DT_BINDINGS_CLK_SUN6I_A31_H_
45
46#define CLK_PLL_VIDEO0_2X 7
47
48#define CLK_PLL_PERIPH 10
49
50#define CLK_PLL_VIDEO1_2X 13
51
Samuel Hollandc4a2da92022-04-27 15:31:20 -050052#define CLK_PLL_MIPI 15
53
Jagan Teki1e097442018-08-05 00:40:09 +053054#define CLK_CPU 18
55
56#define CLK_AHB1_MIPIDSI 23
57#define CLK_AHB1_SS 24
58#define CLK_AHB1_DMA 25
59#define CLK_AHB1_MMC0 26
60#define CLK_AHB1_MMC1 27
61#define CLK_AHB1_MMC2 28
62#define CLK_AHB1_MMC3 29
63#define CLK_AHB1_NAND1 30
64#define CLK_AHB1_NAND0 31
65#define CLK_AHB1_SDRAM 32
66#define CLK_AHB1_EMAC 33
67#define CLK_AHB1_TS 34
68#define CLK_AHB1_HSTIMER 35
69#define CLK_AHB1_SPI0 36
70#define CLK_AHB1_SPI1 37
71#define CLK_AHB1_SPI2 38
72#define CLK_AHB1_SPI3 39
73#define CLK_AHB1_OTG 40
74#define CLK_AHB1_EHCI0 41
75#define CLK_AHB1_EHCI1 42
76#define CLK_AHB1_OHCI0 43
77#define CLK_AHB1_OHCI1 44
78#define CLK_AHB1_OHCI2 45
79#define CLK_AHB1_VE 46
80#define CLK_AHB1_LCD0 47
81#define CLK_AHB1_LCD1 48
82#define CLK_AHB1_CSI 49
83#define CLK_AHB1_HDMI 50
84#define CLK_AHB1_BE0 51
85#define CLK_AHB1_BE1 52
86#define CLK_AHB1_FE0 53
87#define CLK_AHB1_FE1 54
88#define CLK_AHB1_MP 55
89#define CLK_AHB1_GPU 56
90#define CLK_AHB1_DEU0 57
91#define CLK_AHB1_DEU1 58
92#define CLK_AHB1_DRC0 59
93#define CLK_AHB1_DRC1 60
94
95#define CLK_APB1_CODEC 61
96#define CLK_APB1_SPDIF 62
97#define CLK_APB1_DIGITAL_MIC 63
98#define CLK_APB1_PIO 64
99#define CLK_APB1_DAUDIO0 65
100#define CLK_APB1_DAUDIO1 66
101
102#define CLK_APB2_I2C0 67
103#define CLK_APB2_I2C1 68
104#define CLK_APB2_I2C2 69
105#define CLK_APB2_I2C3 70
106#define CLK_APB2_UART0 71
107#define CLK_APB2_UART1 72
108#define CLK_APB2_UART2 73
109#define CLK_APB2_UART3 74
110#define CLK_APB2_UART4 75
111#define CLK_APB2_UART5 76
112
113#define CLK_NAND0 77
114#define CLK_NAND1 78
115#define CLK_MMC0 79
116#define CLK_MMC0_SAMPLE 80
117#define CLK_MMC0_OUTPUT 81
118#define CLK_MMC1 82
119#define CLK_MMC1_SAMPLE 83
120#define CLK_MMC1_OUTPUT 84
121#define CLK_MMC2 85
122#define CLK_MMC2_SAMPLE 86
123#define CLK_MMC2_OUTPUT 87
124#define CLK_MMC3 88
125#define CLK_MMC3_SAMPLE 89
126#define CLK_MMC3_OUTPUT 90
127#define CLK_TS 91
128#define CLK_SS 92
129#define CLK_SPI0 93
130#define CLK_SPI1 94
131#define CLK_SPI2 95
132#define CLK_SPI3 96
133#define CLK_DAUDIO0 97
134#define CLK_DAUDIO1 98
135#define CLK_SPDIF 99
136#define CLK_USB_PHY0 100
137#define CLK_USB_PHY1 101
138#define CLK_USB_PHY2 102
139#define CLK_USB_OHCI0 103
140#define CLK_USB_OHCI1 104
141#define CLK_USB_OHCI2 105
142
143#define CLK_DRAM_VE 110
144#define CLK_DRAM_CSI_ISP 111
145#define CLK_DRAM_TS 112
146#define CLK_DRAM_DRC0 113
147#define CLK_DRAM_DRC1 114
148#define CLK_DRAM_DEU0 115
149#define CLK_DRAM_DEU1 116
150#define CLK_DRAM_FE0 117
151#define CLK_DRAM_FE1 118
152#define CLK_DRAM_BE0 119
153#define CLK_DRAM_BE1 120
154#define CLK_DRAM_MP 121
155
156#define CLK_BE0 122
157#define CLK_BE1 123
158#define CLK_FE0 124
159#define CLK_FE1 125
160#define CLK_MP 126
161#define CLK_LCD0_CH0 127
162#define CLK_LCD1_CH0 128
163#define CLK_LCD0_CH1 129
164#define CLK_LCD1_CH1 130
165#define CLK_CSI0_SCLK 131
166#define CLK_CSI0_MCLK 132
167#define CLK_CSI1_MCLK 133
168#define CLK_VE 134
169#define CLK_CODEC 135
170#define CLK_AVS 136
171#define CLK_DIGITAL_MIC 137
172#define CLK_HDMI 138
173#define CLK_HDMI_DDC 139
174#define CLK_PS 140
175
176#define CLK_MIPI_DSI 143
177#define CLK_MIPI_DSI_DPHY 144
178#define CLK_MIPI_CSI_DPHY 145
179#define CLK_IEP_DRC0 146
180#define CLK_IEP_DRC1 147
181#define CLK_IEP_DEU0 148
182#define CLK_IEP_DEU1 149
183#define CLK_GPU_CORE 150
184#define CLK_GPU_MEMORY 151
185#define CLK_GPU_HYD 152
186#define CLK_ATS 153
187#define CLK_TRACE 154
188
189#define CLK_OUT_A 155
190#define CLK_OUT_B 156
191#define CLK_OUT_C 157
192
193#endif /* _DT_BINDINGS_CLK_SUN6I_A31_H_ */