| wdenk | cc3f8a9 | 2004-07-11 19:17:20 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2004 |
| 3 | * Mark Jonas, Freescale Semiconductor, mark.jonas@freescale.com. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | /* |
| 25 | * Micron MT48LC32M16A2-75 is compatible to: |
| 26 | * - Infineon HYB39S512160AT-75 |
| 27 | */ |
| 28 | |
| 29 | #define SDRAM_DDR 0 /* is SDR */ |
| 30 | |
| 31 | #if defined(CONFIG_MPC5200) |
| 32 | /* Settings for XLB = 132 MHz */ |
| 33 | #define SDRAM_MODE 0x00CD0000 |
| 34 | #define SDRAM_CONTROL 0x514F0000 |
| 35 | #define SDRAM_CONFIG1 0xD2322800 |
| 36 | #define SDRAM_CONFIG2 0x8AD70000 |
| 37 | |
| 38 | #else |
| 39 | #error CONFIG_MPC5200 is not defined |
| 40 | #endif |