blob: 1a1d37ae2a42068b0935e69886b9bea25afbc4ff [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Laurence Withers3ffd9682011-07-18 09:26:01 -04002/*
3 * GPIO driver for TI DaVinci DA8xx SOCs.
4 *
5 * (C) Copyright 2011 Guralp Systems Ltd.
6 * Laurence Withers <lwithers@guralp.com>
Laurence Withers3ffd9682011-07-18 09:26:01 -04007 */
8
9#include <common.h>
Adam Ford9c286a72018-06-10 22:25:57 -050010#include <dm.h>
11#include <fdtdec.h>
Laurence Withers3ffd9682011-07-18 09:26:01 -040012#include <asm/io.h>
13#include <asm/gpio.h>
Laurence Withers3ffd9682011-07-18 09:26:01 -040014#include <asm/arch/hardware.h>
15#include <asm/arch/davinci_misc.h>
16
Adam Ford9c286a72018-06-10 22:25:57 -050017#ifndef CONFIG_DM_GPIO
Laurence Withers3ffd9682011-07-18 09:26:01 -040018static struct gpio_registry {
19 int is_registered;
20 char name[GPIO_NAME_SIZE];
21} gpio_registry[MAX_NUM_GPIOS];
22
Holger Hans Peter Freyther1356f8e2013-02-07 23:41:01 +000023#if defined(CONFIG_SOC_DA8XX)
Laurence Withers3ffd9682011-07-18 09:26:01 -040024#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
25
Tomas Novotny59032872013-02-01 06:46:00 +000026#if defined(CONFIG_SOC_DA8XX) && !defined(CONFIG_SOC_DA850)
27static const struct pinmux_config gpio_pinmux[] = {
28 { pinmux(13), 8, 6 }, /* GP0[0] */
29 { pinmux(13), 8, 7 },
30 { pinmux(14), 8, 0 },
31 { pinmux(14), 8, 1 },
32 { pinmux(14), 8, 2 },
33 { pinmux(14), 8, 3 },
34 { pinmux(14), 8, 4 },
35 { pinmux(14), 8, 5 },
36 { pinmux(14), 8, 6 },
37 { pinmux(14), 8, 7 },
38 { pinmux(15), 8, 0 },
39 { pinmux(15), 8, 1 },
40 { pinmux(15), 8, 2 },
41 { pinmux(15), 8, 3 },
42 { pinmux(15), 8, 4 },
43 { pinmux(15), 8, 5 },
44 { pinmux(15), 8, 6 }, /* GP1[0] */
45 { pinmux(15), 8, 7 },
46 { pinmux(16), 8, 0 },
47 { pinmux(16), 8, 1 },
48 { pinmux(16), 8, 2 },
49 { pinmux(16), 8, 3 },
50 { pinmux(16), 8, 4 },
51 { pinmux(16), 8, 5 },
52 { pinmux(16), 8, 6 },
53 { pinmux(16), 8, 7 },
54 { pinmux(17), 8, 0 },
55 { pinmux(17), 8, 1 },
56 { pinmux(17), 8, 2 },
57 { pinmux(17), 8, 3 },
58 { pinmux(17), 8, 4 },
59 { pinmux(17), 8, 5 },
60 { pinmux(17), 8, 6 }, /* GP2[0] */
61 { pinmux(17), 8, 7 },
62 { pinmux(18), 8, 0 },
63 { pinmux(18), 8, 1 },
64 { pinmux(18), 8, 2 },
65 { pinmux(18), 8, 3 },
66 { pinmux(18), 8, 4 },
67 { pinmux(18), 8, 5 },
68 { pinmux(18), 8, 6 },
69 { pinmux(18), 8, 7 },
70 { pinmux(19), 8, 0 },
71 { pinmux(9), 8, 2 },
72 { pinmux(9), 8, 3 },
73 { pinmux(9), 8, 4 },
74 { pinmux(9), 8, 5 },
75 { pinmux(9), 8, 6 },
76 { pinmux(10), 8, 1 }, /* GP3[0] */
77 { pinmux(10), 8, 2 },
78 { pinmux(10), 8, 3 },
79 { pinmux(10), 8, 4 },
80 { pinmux(10), 8, 5 },
81 { pinmux(10), 8, 6 },
82 { pinmux(10), 8, 7 },
83 { pinmux(11), 8, 0 },
84 { pinmux(11), 8, 1 },
85 { pinmux(11), 8, 2 },
86 { pinmux(11), 8, 3 },
87 { pinmux(11), 8, 4 },
88 { pinmux(9), 8, 7 },
89 { pinmux(2), 8, 6 },
90 { pinmux(11), 8, 5 },
91 { pinmux(11), 8, 6 },
92 { pinmux(12), 8, 4 }, /* GP4[0] */
93 { pinmux(12), 8, 5 },
94 { pinmux(12), 8, 6 },
95 { pinmux(12), 8, 7 },
96 { pinmux(13), 8, 0 },
97 { pinmux(13), 8, 1 },
98 { pinmux(13), 8, 2 },
99 { pinmux(13), 8, 3 },
100 { pinmux(13), 8, 4 },
101 { pinmux(13), 8, 5 },
102 { pinmux(11), 8, 7 },
103 { pinmux(12), 8, 0 },
104 { pinmux(12), 8, 1 },
105 { pinmux(12), 8, 2 },
106 { pinmux(12), 8, 3 },
107 { pinmux(9), 8, 1 },
108 { pinmux(7), 8, 3 }, /* GP5[0] */
109 { pinmux(7), 8, 4 },
110 { pinmux(7), 8, 5 },
111 { pinmux(7), 8, 6 },
112 { pinmux(7), 8, 7 },
113 { pinmux(8), 8, 0 },
114 { pinmux(8), 8, 1 },
115 { pinmux(8), 8, 2 },
116 { pinmux(8), 8, 3 },
117 { pinmux(8), 8, 4 },
118 { pinmux(8), 8, 5 },
119 { pinmux(8), 8, 6 },
120 { pinmux(8), 8, 7 },
121 { pinmux(9), 8, 0 },
122 { pinmux(7), 8, 1 },
123 { pinmux(7), 8, 2 },
124 { pinmux(5), 8, 1 }, /* GP6[0] */
125 { pinmux(5), 8, 2 },
126 { pinmux(5), 8, 3 },
127 { pinmux(5), 8, 4 },
128 { pinmux(5), 8, 5 },
129 { pinmux(5), 8, 6 },
130 { pinmux(5), 8, 7 },
131 { pinmux(6), 8, 0 },
132 { pinmux(6), 8, 1 },
133 { pinmux(6), 8, 2 },
134 { pinmux(6), 8, 3 },
135 { pinmux(6), 8, 4 },
136 { pinmux(6), 8, 5 },
137 { pinmux(6), 8, 6 },
138 { pinmux(6), 8, 7 },
139 { pinmux(7), 8, 0 },
140 { pinmux(1), 8, 0 }, /* GP7[0] */
141 { pinmux(1), 8, 1 },
142 { pinmux(1), 8, 2 },
143 { pinmux(1), 8, 3 },
144 { pinmux(1), 8, 4 },
145 { pinmux(1), 8, 5 },
146 { pinmux(1), 8, 6 },
147 { pinmux(1), 8, 7 },
148 { pinmux(2), 8, 0 },
149 { pinmux(2), 8, 1 },
150 { pinmux(2), 8, 2 },
151 { pinmux(2), 8, 3 },
152 { pinmux(2), 8, 4 },
153 { pinmux(2), 8, 5 },
154 { pinmux(0), 1, 0 },
155 { pinmux(0), 1, 1 },
156};
Tom Rini9dbc8362013-03-11 12:02:40 -0400157#else /* CONFIG_SOC_DA8XX && CONFIG_SOC_DA850 */
Laurence Withers3ffd9682011-07-18 09:26:01 -0400158static const struct pinmux_config gpio_pinmux[] = {
159 { pinmux(1), 8, 7 }, /* GP0[0] */
160 { pinmux(1), 8, 6 },
161 { pinmux(1), 8, 5 },
162 { pinmux(1), 8, 4 },
163 { pinmux(1), 8, 3 },
164 { pinmux(1), 8, 2 },
165 { pinmux(1), 8, 1 },
166 { pinmux(1), 8, 0 },
167 { pinmux(0), 8, 7 },
168 { pinmux(0), 8, 6 },
169 { pinmux(0), 8, 5 },
170 { pinmux(0), 8, 4 },
171 { pinmux(0), 8, 3 },
172 { pinmux(0), 8, 2 },
173 { pinmux(0), 8, 1 },
174 { pinmux(0), 8, 0 },
175 { pinmux(4), 8, 7 }, /* GP1[0] */
176 { pinmux(4), 8, 6 },
177 { pinmux(4), 8, 5 },
178 { pinmux(4), 8, 4 },
179 { pinmux(4), 8, 3 },
180 { pinmux(4), 8, 2 },
181 { pinmux(4), 4, 1 },
182 { pinmux(4), 4, 0 },
183 { pinmux(3), 4, 0 },
184 { pinmux(2), 4, 6 },
185 { pinmux(2), 4, 5 },
186 { pinmux(2), 4, 4 },
187 { pinmux(2), 4, 3 },
188 { pinmux(2), 4, 2 },
189 { pinmux(2), 4, 1 },
190 { pinmux(2), 8, 0 },
191 { pinmux(6), 8, 7 }, /* GP2[0] */
192 { pinmux(6), 8, 6 },
193 { pinmux(6), 8, 5 },
194 { pinmux(6), 8, 4 },
195 { pinmux(6), 8, 3 },
196 { pinmux(6), 8, 2 },
197 { pinmux(6), 8, 1 },
198 { pinmux(6), 8, 0 },
199 { pinmux(5), 8, 7 },
200 { pinmux(5), 8, 6 },
201 { pinmux(5), 8, 5 },
202 { pinmux(5), 8, 4 },
203 { pinmux(5), 8, 3 },
204 { pinmux(5), 8, 2 },
205 { pinmux(5), 8, 1 },
206 { pinmux(5), 8, 0 },
207 { pinmux(8), 8, 7 }, /* GP3[0] */
208 { pinmux(8), 8, 6 },
209 { pinmux(8), 8, 5 },
210 { pinmux(8), 8, 4 },
211 { pinmux(8), 8, 3 },
212 { pinmux(8), 8, 2 },
213 { pinmux(8), 8, 1 },
214 { pinmux(8), 8, 0 },
215 { pinmux(7), 8, 7 },
216 { pinmux(7), 8, 6 },
217 { pinmux(7), 8, 5 },
218 { pinmux(7), 8, 4 },
219 { pinmux(7), 8, 3 },
220 { pinmux(7), 8, 2 },
221 { pinmux(7), 8, 1 },
222 { pinmux(7), 8, 0 },
223 { pinmux(10), 8, 7 }, /* GP4[0] */
224 { pinmux(10), 8, 6 },
225 { pinmux(10), 8, 5 },
226 { pinmux(10), 8, 4 },
227 { pinmux(10), 8, 3 },
228 { pinmux(10), 8, 2 },
229 { pinmux(10), 8, 1 },
230 { pinmux(10), 8, 0 },
231 { pinmux(9), 8, 7 },
232 { pinmux(9), 8, 6 },
233 { pinmux(9), 8, 5 },
234 { pinmux(9), 8, 4 },
235 { pinmux(9), 8, 3 },
236 { pinmux(9), 8, 2 },
237 { pinmux(9), 8, 1 },
238 { pinmux(9), 8, 0 },
239 { pinmux(12), 8, 7 }, /* GP5[0] */
240 { pinmux(12), 8, 6 },
241 { pinmux(12), 8, 5 },
242 { pinmux(12), 8, 4 },
243 { pinmux(12), 8, 3 },
244 { pinmux(12), 8, 2 },
245 { pinmux(12), 8, 1 },
246 { pinmux(12), 8, 0 },
247 { pinmux(11), 8, 7 },
248 { pinmux(11), 8, 6 },
249 { pinmux(11), 8, 5 },
250 { pinmux(11), 8, 4 },
251 { pinmux(11), 8, 3 },
252 { pinmux(11), 8, 2 },
253 { pinmux(11), 8, 1 },
254 { pinmux(11), 8, 0 },
255 { pinmux(19), 8, 6 }, /* GP6[0] */
256 { pinmux(19), 8, 5 },
257 { pinmux(19), 8, 4 },
258 { pinmux(19), 8, 3 },
259 { pinmux(19), 8, 2 },
260 { pinmux(16), 8, 1 },
261 { pinmux(14), 8, 1 },
262 { pinmux(14), 8, 0 },
263 { pinmux(13), 8, 7 },
264 { pinmux(13), 8, 6 },
265 { pinmux(13), 8, 5 },
266 { pinmux(13), 8, 4 },
267 { pinmux(13), 8, 3 },
268 { pinmux(13), 8, 2 },
269 { pinmux(13), 8, 1 },
270 { pinmux(13), 8, 0 },
271 { pinmux(18), 8, 1 }, /* GP7[0] */
272 { pinmux(18), 8, 0 },
273 { pinmux(17), 8, 7 },
274 { pinmux(17), 8, 6 },
275 { pinmux(17), 8, 5 },
276 { pinmux(17), 8, 4 },
277 { pinmux(17), 8, 3 },
278 { pinmux(17), 8, 2 },
279 { pinmux(17), 8, 1 },
280 { pinmux(17), 8, 0 },
281 { pinmux(16), 8, 7 },
282 { pinmux(16), 8, 6 },
283 { pinmux(16), 8, 5 },
284 { pinmux(16), 8, 4 },
285 { pinmux(16), 8, 3 },
286 { pinmux(16), 8, 2 },
287 { pinmux(19), 8, 0 }, /* GP8[0] */
288 { pinmux(3), 4, 7 },
289 { pinmux(3), 4, 6 },
290 { pinmux(3), 4, 5 },
291 { pinmux(3), 4, 4 },
292 { pinmux(3), 4, 3 },
293 { pinmux(3), 4, 2 },
294 { pinmux(2), 4, 7 },
295 { pinmux(19), 8, 1 },
296 { pinmux(19), 8, 0 },
297 { pinmux(18), 8, 7 },
298 { pinmux(18), 8, 6 },
299 { pinmux(18), 8, 5 },
300 { pinmux(18), 8, 4 },
301 { pinmux(18), 8, 3 },
302 { pinmux(18), 8, 2 },
303};
Tom Rini9dbc8362013-03-11 12:02:40 -0400304#endif /* CONFIG_SOC_DA8XX && !CONFIG_SOC_DA850 */
305#else /* !CONFIG_SOC_DA8XX */
Holger Hans Peter Freyther1356f8e2013-02-07 23:41:01 +0000306#define davinci_configure_pin_mux(a, b)
Tom Rini9dbc8362013-03-11 12:02:40 -0400307#endif /* CONFIG_SOC_DA8XX */
Laurence Withers3ffd9682011-07-18 09:26:01 -0400308
Adam Ford9c286a72018-06-10 22:25:57 -0500309int gpio_request(unsigned int gpio, const char *label)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400310{
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600311 if (gpio >= MAX_NUM_GPIOS)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400312 return -1;
313
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600314 if (gpio_registry[gpio].is_registered)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400315 return -1;
316
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600317 gpio_registry[gpio].is_registered = 1;
318 strncpy(gpio_registry[gpio].name, label, GPIO_NAME_SIZE);
319 gpio_registry[gpio].name[GPIO_NAME_SIZE - 1] = 0;
Laurence Withers3ffd9682011-07-18 09:26:01 -0400320
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600321 davinci_configure_pin_mux(&gpio_pinmux[gpio], 1);
Laurence Withers3ffd9682011-07-18 09:26:01 -0400322
323 return 0;
324}
325
Adam Ford9c286a72018-06-10 22:25:57 -0500326int gpio_free(unsigned int gpio)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400327{
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600328 if (gpio >= MAX_NUM_GPIOS)
329 return -1;
Laurence Withers3ffd9682011-07-18 09:26:01 -0400330
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600331 if (!gpio_registry[gpio].is_registered)
332 return -1;
333
334 gpio_registry[gpio].is_registered = 0;
335 gpio_registry[gpio].name[0] = '\0';
336 /* Do not configure as input or change pin mux here */
337 return 0;
Laurence Withers3ffd9682011-07-18 09:26:01 -0400338}
Adam Ford9c286a72018-06-10 22:25:57 -0500339#endif
Laurence Withers3ffd9682011-07-18 09:26:01 -0400340
Adam Ford9c286a72018-06-10 22:25:57 -0500341static int _gpio_direction_output(struct davinci_gpio *bank, unsigned int gpio, int value)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400342{
Adam Ford9c286a72018-06-10 22:25:57 -0500343 clrbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
344 gpio_set_value(gpio, value);
Laurence Withers3ffd9682011-07-18 09:26:01 -0400345 return 0;
346}
347
Adam Ford9c286a72018-06-10 22:25:57 -0500348static int _gpio_direction_input(struct davinci_gpio *bank, unsigned int gpio)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400349{
Adam Ford9c286a72018-06-10 22:25:57 -0500350 setbits_le32(&bank->dir, 1U << GPIO_BIT(gpio));
Laurence Withers3ffd9682011-07-18 09:26:01 -0400351 return 0;
352}
353
Adam Ford9c286a72018-06-10 22:25:57 -0500354static int _gpio_get_value(struct davinci_gpio *bank, unsigned int gpio)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400355{
Laurence Withers3ffd9682011-07-18 09:26:01 -0400356 unsigned int ip;
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600357 ip = in_le32(&bank->in_data) & (1U << GPIO_BIT(gpio));
Laurence Withers3ffd9682011-07-18 09:26:01 -0400358 return ip ? 1 : 0;
359}
360
Adam Ford9c286a72018-06-10 22:25:57 -0500361static int _gpio_set_value(struct davinci_gpio *bank, unsigned int gpio, int value)
Laurence Withers3ffd9682011-07-18 09:26:01 -0400362{
Laurence Withers3ffd9682011-07-18 09:26:01 -0400363 if (value)
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600364 bank->set_data = 1U << GPIO_BIT(gpio);
Laurence Withers3ffd9682011-07-18 09:26:01 -0400365 else
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600366 bank->clr_data = 1U << GPIO_BIT(gpio);
367
368 return 0;
Laurence Withers3ffd9682011-07-18 09:26:01 -0400369}
370
Adam Ford9c286a72018-06-10 22:25:57 -0500371static int _gpio_get_dir(struct davinci_gpio *bank, unsigned int gpio)
372{
373 return in_le32(&bank->dir) & (1U << GPIO_BIT(gpio));
374}
375
376#ifndef CONFIG_DM_GPIO
377
Laurence Withers3ffd9682011-07-18 09:26:01 -0400378void gpio_info(void)
379{
Adam Ford9c286a72018-06-10 22:25:57 -0500380 unsigned int gpio, dir, val;
Laurence Withers3ffd9682011-07-18 09:26:01 -0400381 struct davinci_gpio *bank;
382
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600383 for (gpio = 0; gpio < MAX_NUM_GPIOS; ++gpio) {
384 bank = GPIO_BANK(gpio);
Adam Ford9c286a72018-06-10 22:25:57 -0500385 dir = _gpio_get_dir(bank, gpio);
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600386 val = gpio_get_value(gpio);
Laurence Withers3ffd9682011-07-18 09:26:01 -0400387
388 printf("% 4d: %s: %d [%c] %s\n",
Joe Hershbergerf8928f12011-11-11 15:55:36 -0600389 gpio, dir ? " in" : "out", val,
390 gpio_registry[gpio].is_registered ? 'x' : ' ',
391 gpio_registry[gpio].name);
Laurence Withers3ffd9682011-07-18 09:26:01 -0400392 }
393}
Adam Ford9c286a72018-06-10 22:25:57 -0500394
395int gpio_direction_input(unsigned int gpio)
396{
397 struct davinci_gpio *bank;
398
399 bank = GPIO_BANK(gpio);
400 return _gpio_direction_input(bank, gpio);
401}
402
403int gpio_direction_output(unsigned int gpio, int value)
404{
405 struct davinci_gpio *bank;
406
407 bank = GPIO_BANK(gpio);
408 return _gpio_direction_output(bank, gpio, value);
409}
410
411int gpio_get_value(unsigned int gpio)
412{
413 struct davinci_gpio *bank;
414
415 bank = GPIO_BANK(gpio);
416 return _gpio_get_value(bank, gpio);
417}
418
419int gpio_set_value(unsigned int gpio, int value)
420{
421 struct davinci_gpio *bank;
422
423 bank = GPIO_BANK(gpio);
424 return _gpio_set_value(bank, gpio, value);
425}
426
427#else /* CONFIG_DM_GPIO */
428
429static struct davinci_gpio *davinci_get_gpio_bank(struct udevice *dev, unsigned int offset)
430{
431 struct davinci_gpio_bank *bank = dev_get_priv(dev);
432
433 /* The device tree is not broken into banks but the infrastructure is
434 * expecting it this way, so we'll first include the 0x10 offset, then
435 * calculate the bank manually based on the offset.
436 */
437
438 return ((struct davinci_gpio *)bank->base) + 0x10 + (offset >> 5);
439}
440
441static int davinci_gpio_direction_input(struct udevice *dev, unsigned int offset)
442{
443 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
444
445 _gpio_direction_input(base, offset);
446 return 0;
447}
448
449static int davinci_gpio_direction_output(struct udevice *dev, unsigned int offset,
450 int value)
451{
452 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
453
454 _gpio_direction_output(base, offset, value);
455 return 0;
456}
457
458static int davinci_gpio_get_value(struct udevice *dev, unsigned int offset)
459{
460 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
461
462 return _gpio_get_value(base, offset);
463}
464
465static int davinci_gpio_set_value(struct udevice *dev, unsigned int offset,
466 int value)
467{
468 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
469
470 _gpio_set_value(base, offset, value);
471
472 return 0;
473}
474
475static int davinci_gpio_get_function(struct udevice *dev, unsigned int offset)
476{
477 unsigned int dir;
478 struct davinci_gpio *base = davinci_get_gpio_bank(dev, offset);
479
480 dir = _gpio_get_dir(base, offset);
481
482 if (dir)
483 return GPIOF_INPUT;
484
485 return GPIOF_OUTPUT;
486}
487
488static const struct dm_gpio_ops gpio_davinci_ops = {
489 .direction_input = davinci_gpio_direction_input,
490 .direction_output = davinci_gpio_direction_output,
491 .get_value = davinci_gpio_get_value,
492 .set_value = davinci_gpio_set_value,
493 .get_function = davinci_gpio_get_function,
494};
495
496static int davinci_gpio_probe(struct udevice *dev)
497{
498 struct davinci_gpio_bank *bank = dev_get_priv(dev);
499 struct davinci_gpio_platdata *plat = dev_get_platdata(dev);
500 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
501 const void *fdt = gd->fdt_blob;
502 int node = dev_of_offset(dev);
503
504 uc_priv->bank_name = plat->port_name;
505 uc_priv->gpio_count = fdtdec_get_int(fdt, node, "ti,ngpio", -1);
506 bank->base = (struct davinci_gpio *)plat->base;
507 return 0;
508}
509
510static const struct udevice_id davinci_gpio_ids[] = {
511 { .compatible = "ti,dm6441-gpio" },
512 { }
513};
514
515static int davinci_gpio_ofdata_to_platdata(struct udevice *dev)
516{
517 struct davinci_gpio_platdata *plat = dev_get_platdata(dev);
518 fdt_addr_t addr;
519
520 addr = devfdt_get_addr(dev);
521 if (addr == FDT_ADDR_T_NONE)
522 return -EINVAL;
523
524 plat->base = addr;
525 return 0;
526}
527
528U_BOOT_DRIVER(gpio_davinci) = {
529 .name = "gpio_davinci",
530 .id = UCLASS_GPIO,
531 .ops = &gpio_davinci_ops,
532 .ofdata_to_platdata = of_match_ptr(davinci_gpio_ofdata_to_platdata),
533 .of_match = davinci_gpio_ids,
534 .bind = dm_scan_fdt_dev,
535 .platdata_auto_alloc_size = sizeof(struct davinci_gpio_platdata),
536 .probe = davinci_gpio_probe,
537 .priv_auto_alloc_size = sizeof(struct davinci_gpio_bank),
538};
539
540#endif