Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright 2018 NXP |
| 4 | * |
| 5 | * Peng Fan <peng.fan@nxp.com> |
| 6 | */ |
| 7 | |
| 8 | #ifndef _IMX8IMAGE_H_ |
| 9 | #define _IMX8IMAGE_H_ |
| 10 | |
| 11 | #include <image.h> |
| 12 | #include <inttypes.h> |
| 13 | #include "imagetool.h" |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 14 | |
| 15 | #define __packed __attribute__((packed)) |
| 16 | |
| 17 | #define IV_MAX_LEN 32 |
| 18 | #define HASH_MAX_LEN 64 |
| 19 | #define MAX_NUM_IMGS 6 |
| 20 | #define MAX_NUM_SRK_RECORDS 4 |
| 21 | |
| 22 | #define IVT_HEADER_TAG_B0 0x87 |
| 23 | #define IVT_VERSION_B0 0x00 |
| 24 | |
| 25 | #define IMG_FLAG_HASH_SHA256 0x000 |
| 26 | #define IMG_FLAG_HASH_SHA384 0x100 |
| 27 | #define IMG_FLAG_HASH_SHA512 0x200 |
| 28 | |
| 29 | #define IMG_FLAG_ENCRYPTED_MASK 0x400 |
| 30 | #define IMG_FLAG_ENCRYPTED_SHIFT 0x0A |
| 31 | |
| 32 | #define IMG_FLAG_BOOTFLAGS_MASK 0xFFFF0000 |
| 33 | #define IMG_FLAG_BOOTFLAGS_SHIFT 0x10 |
| 34 | |
| 35 | #define IMG_ARRAY_ENTRY_SIZE 128 |
| 36 | #define HEADER_IMG_ARRAY_OFFSET 0x10 |
| 37 | |
| 38 | #define HASH_TYPE_SHA_256 256 |
| 39 | #define HASH_TYPE_SHA_384 384 |
| 40 | #define HASH_TYPE_SHA_512 512 |
| 41 | |
| 42 | #define IMAGE_HASH_ALGO_DEFAULT 384 |
| 43 | #define IMAGE_PADDING_DEFAULT 0x1000 |
| 44 | |
| 45 | #define DCD_ENTRY_ADDR_IN_SCFW 0x240 |
| 46 | |
| 47 | #define CONTAINER_ALIGNMENT 0x400 |
| 48 | #define CONTAINER_FLAGS_DEFAULT 0x10 |
| 49 | #define CONTAINER_FUSE_DEFAULT 0x0 |
| 50 | |
| 51 | #define SIGNATURE_BLOCK_HEADER_LENGTH 0x10 |
| 52 | |
| 53 | #define MAX_NUM_OF_CONTAINER 2 |
| 54 | |
| 55 | #define FIRST_CONTAINER_HEADER_LENGTH 0x400 |
| 56 | |
| 57 | #define BOOT_IMG_META_MU_RID_SHIFT 10 |
| 58 | #define BOOT_IMG_META_PART_ID_SHIFT 20 |
| 59 | |
| 60 | #define IMAGE_A35_DEFAULT_META(PART) (((PART == 0) ? \ |
| 61 | PARTITION_ID_AP : PART) << \ |
| 62 | BOOT_IMG_META_PART_ID_SHIFT | \ |
| 63 | SC_R_MU_0A << \ |
| 64 | BOOT_IMG_META_MU_RID_SHIFT | \ |
| 65 | SC_R_A35_0) |
| 66 | |
| 67 | #define IMAGE_A53_DEFAULT_META(PART) (((PART == 0) ? \ |
| 68 | PARTITION_ID_AP : PART) << \ |
| 69 | BOOT_IMG_META_PART_ID_SHIFT | \ |
| 70 | SC_R_MU_0A << \ |
| 71 | BOOT_IMG_META_MU_RID_SHIFT | \ |
| 72 | SC_R_A53_0) |
| 73 | |
| 74 | #define IMAGE_A72_DEFAULT_META(PART) (((PART == 0) ? \ |
| 75 | PARTITION_ID_AP : PART) << \ |
| 76 | BOOT_IMG_META_PART_ID_SHIFT | \ |
| 77 | SC_R_MU_0A << \ |
| 78 | BOOT_IMG_META_MU_RID_SHIFT | \ |
| 79 | SC_R_A72_0) |
| 80 | |
| 81 | #define IMAGE_M4_0_DEFAULT_META(PART) (((PART == 0) ? \ |
| 82 | PARTITION_ID_M4 : PART) << \ |
| 83 | BOOT_IMG_META_PART_ID_SHIFT | \ |
| 84 | SC_R_M4_0_MU_1A << \ |
| 85 | BOOT_IMG_META_MU_RID_SHIFT | \ |
| 86 | SC_R_M4_0_PID0) |
| 87 | |
| 88 | #define IMAGE_M4_1_DEFAULT_META(PART) (((PART == 0) ? \ |
| 89 | PARTITION_ID_M4 : PART) << \ |
| 90 | BOOT_IMG_META_PART_ID_SHIFT | \ |
| 91 | SC_R_M4_1_MU_1A << \ |
| 92 | BOOT_IMG_META_MU_RID_SHIFT | \ |
| 93 | SC_R_M4_1_PID0) |
| 94 | |
| 95 | #define CONTAINER_IMAGE_ARRAY_START_OFFSET 0x2000 |
| 96 | |
| 97 | typedef struct { |
| 98 | uint8_t version; |
| 99 | uint16_t length; |
| 100 | uint8_t tag; |
| 101 | uint16_t srk_table_offset; |
| 102 | uint16_t cert_offset; |
| 103 | uint16_t blob_offset; |
| 104 | uint16_t signature_offset; |
| 105 | uint32_t reserved; |
| 106 | } __packed sig_blk_hdr_t; |
| 107 | |
| 108 | typedef struct { |
| 109 | uint32_t offset; |
| 110 | uint32_t size; |
| 111 | uint64_t dst; |
| 112 | uint64_t entry; |
| 113 | uint32_t hab_flags; |
| 114 | uint32_t meta; |
| 115 | uint8_t hash[HASH_MAX_LEN]; |
| 116 | uint8_t iv[IV_MAX_LEN]; |
| 117 | } __packed boot_img_t; |
| 118 | |
| 119 | typedef struct { |
| 120 | uint8_t version; |
| 121 | uint16_t length; |
| 122 | uint8_t tag; |
| 123 | uint32_t flags; |
| 124 | uint16_t sw_version; |
| 125 | uint8_t fuse_version; |
| 126 | uint8_t num_images; |
| 127 | uint16_t sig_blk_offset; |
| 128 | uint16_t reserved; |
| 129 | boot_img_t img[MAX_NUM_IMGS]; |
| 130 | sig_blk_hdr_t sig_blk_hdr; |
| 131 | uint32_t sigblk_size; |
| 132 | uint32_t padding; |
| 133 | } __packed flash_header_v3_t; |
| 134 | |
| 135 | typedef struct { |
| 136 | flash_header_v3_t fhdr[MAX_NUM_OF_CONTAINER]; |
| 137 | } __packed imx_header_v3_t; |
| 138 | |
| 139 | struct image_array { |
| 140 | char *name; |
| 141 | unsigned int core_type; |
| 142 | unsigned int core_id; |
| 143 | unsigned int load_addr; |
| 144 | }; |
| 145 | |
| 146 | enum imx8image_cmd { |
| 147 | CMD_INVALID, |
| 148 | CMD_BOOT_FROM, |
| 149 | CMD_FUSE_VERSION, |
| 150 | CMD_SW_VERSION, |
| 151 | CMD_MSG_BLOCK, |
| 152 | CMD_FILEOFF, |
| 153 | CMD_FLAG, |
| 154 | CMD_APPEND, |
| 155 | CMD_PARTITION, |
| 156 | CMD_SOC_TYPE, |
| 157 | CMD_CONTAINER, |
| 158 | CMD_IMAGE, |
| 159 | CMD_DATA |
| 160 | }; |
| 161 | |
| 162 | enum imx8image_core_type { |
| 163 | CFG_CORE_INVALID, |
| 164 | CFG_SCU, |
Gary Bisson | a1e98d6 | 2024-08-05 23:25:08 +0200 | [diff] [blame] | 165 | CFG_PWR, |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 166 | CFG_M40, |
| 167 | CFG_M41, |
| 168 | CFG_A35, |
Peng Fan | eeb23bf | 2022-07-26 16:41:19 +0800 | [diff] [blame] | 169 | CFG_A55, |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 170 | CFG_A53, |
| 171 | CFG_A72 |
| 172 | }; |
| 173 | |
| 174 | enum imx8image_fld_types { |
| 175 | CFG_INVALID = -1, |
| 176 | CFG_COMMAND, |
| 177 | CFG_CORE_TYPE, |
| 178 | CFG_IMAGE_NAME, |
| 179 | CFG_LOAD_ADDR |
| 180 | }; |
| 181 | |
| 182 | typedef enum SOC_TYPE { |
| 183 | NONE = 0, |
| 184 | QX, |
Peng Fan | eeb23bf | 2022-07-26 16:41:19 +0800 | [diff] [blame] | 185 | QM, |
| 186 | ULP, |
| 187 | IMX9 |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 188 | } soc_type_t; |
| 189 | |
| 190 | typedef enum option_type { |
| 191 | NO_IMG = 0, |
| 192 | DCD, |
| 193 | SCFW, |
| 194 | SECO, |
| 195 | M40, |
| 196 | M41, |
| 197 | AP, |
| 198 | OUTPUT, |
| 199 | SCD, |
| 200 | CSF, |
| 201 | FLAG, |
| 202 | DEVICE, |
| 203 | NEW_CONTAINER, |
| 204 | APPEND, |
| 205 | DATA, |
| 206 | PARTITION, |
| 207 | FILEOFF, |
Peng Fan | eeb23bf | 2022-07-26 16:41:19 +0800 | [diff] [blame] | 208 | MSG_BLOCK, |
| 209 | SENTINEL, |
| 210 | UPOWER |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 211 | } option_type_t; |
| 212 | |
| 213 | typedef struct { |
| 214 | option_type_t option; |
| 215 | char *filename; |
| 216 | uint64_t src; |
| 217 | uint64_t dst; |
| 218 | uint64_t entry; |
| 219 | uint64_t ext; |
| 220 | } image_t; |
| 221 | |
| 222 | #define CORE_SC 1 |
| 223 | #define CORE_CM4_0 2 |
| 224 | #define CORE_CM4_1 3 |
| 225 | #define CORE_CA53 4 |
| 226 | #define CORE_CA35 4 |
| 227 | #define CORE_CA72 5 |
| 228 | #define CORE_SECO 6 |
| 229 | |
Peng Fan | eeb23bf | 2022-07-26 16:41:19 +0800 | [diff] [blame] | 230 | #define CORE_ULP_CM33 0x1 |
| 231 | #define CORE_ULP_CA35 0x2 |
| 232 | #define CORE_ULP_UPOWER 0x4 |
| 233 | #define CORE_ULP_SENTINEL 0x6 |
| 234 | |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 235 | #define SC_R_OTP 357U |
| 236 | #define SC_R_DEBUG 354U |
| 237 | #define SC_R_ROM_0 236U |
| 238 | |
| 239 | #define MSG_DEBUG_EN SC_R_DEBUG |
| 240 | #define MSG_FUSE SC_R_OTP |
| 241 | #define MSG_FIELD SC_R_ROM_0 |
| 242 | |
| 243 | #define IMG_TYPE_CSF 0x01 /* CSF image type */ |
| 244 | #define IMG_TYPE_SCD 0x02 /* SCD image type */ |
| 245 | #define IMG_TYPE_EXEC 0x03 /* Executable image type */ |
| 246 | #define IMG_TYPE_DATA 0x04 /* Data image type */ |
| 247 | #define IMG_TYPE_DCD_DDR 0x05 /* DCD/DDR image type */ |
| 248 | #define IMG_TYPE_SECO 0x06 /* SECO image type */ |
Peng Fan | eeb23bf | 2022-07-26 16:41:19 +0800 | [diff] [blame] | 249 | #define IMG_TYPE_SENTINEL 0x06 /* SENTINEL image type */ |
Peng Fan | 60a5607 | 2018-10-16 04:50:30 +0000 | [diff] [blame] | 250 | #define IMG_TYPE_PROV 0x07 /* Provisioning image type */ |
| 251 | #define IMG_TYPE_DEK 0x08 /* DEK validation type */ |
| 252 | |
| 253 | #define IMG_TYPE_SHIFT 0 |
| 254 | #define IMG_TYPE_MASK 0x1f |
| 255 | #define IMG_TYPE(x) (((x) & IMG_TYPE_MASK) >> IMG_TYPE_SHIFT) |
| 256 | |
| 257 | #define BOOT_IMG_FLAGS_CORE_MASK 0xF |
| 258 | #define BOOT_IMG_FLAGS_CORE_SHIFT 0x04 |
| 259 | #define BOOT_IMG_FLAGS_CPU_RID_MASK 0x3FF0 |
| 260 | #define BOOT_IMG_FLAGS_CPU_RID_SHIFT 4 |
| 261 | #define BOOT_IMG_FLAGS_MU_RID_MASK 0xFFC000 |
| 262 | #define BOOT_IMG_FLAGS_MU_RID_SHIFT 14 |
| 263 | #define BOOT_IMG_FLAGS_PARTITION_ID_MASK 0x1F000000 |
| 264 | #define BOOT_IMG_FLAGS_PARTITION_ID_SHIFT 24 |
| 265 | |
| 266 | /* Resource id used in scfw */ |
| 267 | #define SC_R_A35_0 508 |
| 268 | #define SC_R_A53_0 1 |
| 269 | #define SC_R_A72_0 6 |
| 270 | #define SC_R_MU_0A 213 |
| 271 | #define SC_R_M4_0_PID0 278 |
| 272 | #define SC_R_M4_0_MU_1A 297 |
| 273 | #define SC_R_M4_1_PID0 298 |
| 274 | #define SC_R_M4_1_MU_1A 317 |
| 275 | #define PARTITION_ID_M4 0 |
| 276 | #define PARTITION_ID_AP 1 |
| 277 | |
| 278 | #define IMG_STACK_SIZE 32 |
| 279 | |
| 280 | #define append(p, s, l) do { \ |
| 281 | memcpy((p), (uint8_t *)(s), (l)); (p) += (l); \ |
| 282 | } while (0) |
| 283 | |
| 284 | #endif |