blob: 00e673a4db08bc65d36da0815035a5c6d923a85c [file] [log] [blame]
Simon Glass90ca96a2023-07-15 21:39:18 -06001// SPDX-License-Identifier: GPL-2.0
2/*
3 * Modified from coreboot bochs.c
4 */
5
6#define LOG_CATEGORY UCLASS_VIDEO
7
Simon Glass90ca96a2023-07-15 21:39:18 -06008#include <dm.h>
9#include <log.h>
10#include <pci.h>
11#include <video.h>
12#include <asm/io.h>
Simon Glass90ca96a2023-07-15 21:39:18 -060013#include <linux/sizes.h>
14#include "bochs.h"
15
16static int xsize = CONFIG_VIDEO_BOCHS_SIZE_X;
17static int ysize = CONFIG_VIDEO_BOCHS_SIZE_Y;
18
19static void bochs_write(void *mmio, int index, int val)
20{
21 writew(val, mmio + MMIO_BASE + index * 2);
22}
23
24static int bochs_read(void *mmio, int index)
25{
26 return readw(mmio + MMIO_BASE + index * 2);
27}
28
Bin Mengb745ac22023-07-23 12:40:27 +080029static void bochs_vga_write(void *mmio, int index, uint8_t val)
Simon Glass90ca96a2023-07-15 21:39:18 -060030{
Bin Mengb745ac22023-07-23 12:40:27 +080031 writeb(val, mmio + VGA_BASE + index);
Simon Glass90ca96a2023-07-15 21:39:18 -060032}
33
34static int bochs_init_fb(struct udevice *dev)
35{
36 struct video_uc_plat *plat = dev_get_uclass_plat(dev);
37 struct video_priv *uc_priv = dev_get_uclass_priv(dev);
38 ulong fb;
39 void *mmio;
40 int id, mem;
41
42 log_debug("probing %s at PCI %x\n", dev->name, dm_pci_get_bdf(dev));
43 fb = dm_pci_read_bar32(dev, 0);
44 if (!fb)
45 return log_msg_ret("fb", -EIO);
46
47 /* MMIO bar supported since qemu 3.0+ */
48 mmio = dm_pci_map_bar(dev, PCI_BASE_ADDRESS_2, 0, 0, PCI_REGION_TYPE,
49 PCI_REGION_MEM);
50
51 if (!mmio)
52 return log_msg_ret("map", -EIO);
53
54 /* bochs dispi detection */
55 id = bochs_read(mmio, INDEX_ID);
56 if ((id & 0xfff0) != ID0) {
57 log_debug("ID mismatch\n");
58 return -EPROTONOSUPPORT;
59 }
60 mem = bochs_read(mmio, INDEX_VIDEO_MEMORY_64K) * SZ_64K;
61 log_debug("QEMU VGA: bochs @ %p: %d MiB FB at %lx\n", mmio, mem / SZ_1M,
62 fb);
63
64 uc_priv->xsize = xsize;
65 uc_priv->ysize = ysize;
66 uc_priv->bpix = VIDEO_BPP32;
67
68 /* setup video mode */
69 bochs_write(mmio, INDEX_ENABLE, 0);
70 bochs_write(mmio, INDEX_BANK, 0);
71 bochs_write(mmio, INDEX_BPP, VNBITS(uc_priv->bpix));
72 bochs_write(mmio, INDEX_XRES, xsize);
73 bochs_write(mmio, INDEX_YRES, ysize);
74 bochs_write(mmio, INDEX_VIRT_WIDTH, xsize);
75 bochs_write(mmio, INDEX_VIRT_HEIGHT, ysize);
76 bochs_write(mmio, INDEX_X_OFFSET, 0);
77 bochs_write(mmio, INDEX_Y_OFFSET, 0);
78 bochs_write(mmio, INDEX_ENABLE, ENABLED | LFB_ENABLED);
79
Bin Mengb9e58252023-07-23 12:40:26 +080080 /* disable blanking */
Bin Mengb745ac22023-07-23 12:40:27 +080081 bochs_vga_write(mmio, VGA_ATT_W - VGA_INDEX, VGA_AR_ENABLE_DISPLAY);
Simon Glass90ca96a2023-07-15 21:39:18 -060082
83 plat->base = fb;
84
85 return 0;
86}
87
88static int bochs_video_probe(struct udevice *dev)
89{
90 int ret;
91
92 ret = bochs_init_fb(dev);
93 if (ret)
94 return log_ret(ret);
95
96 return 0;
97}
98
99static int bochs_video_bind(struct udevice *dev)
100{
101 struct video_uc_plat *uc_plat = dev_get_uclass_plat(dev);
102
Bin Mengd40bc9e2023-07-23 12:40:32 +0800103 /* Set the frame buffer size per configuration */
104 uc_plat->size = xsize * ysize * 32 / 8;
Simon Glass90ca96a2023-07-15 21:39:18 -0600105 log_debug("%s: Frame buffer size %x\n", __func__, uc_plat->size);
106
107 return 0;
108}
109
110U_BOOT_DRIVER(bochs_video) = {
111 .name = "bochs_video",
112 .id = UCLASS_VIDEO,
113 .bind = bochs_video_bind,
114 .probe = bochs_video_probe,
115};
116
117static struct pci_device_id bochs_video_supported[] = {
118 { PCI_DEVICE(0x1234, 0x1111) },
119 { },
120};
121
122U_BOOT_PCI_DEVICE(bochs_video, bochs_video_supported);