blob: 91a40ab9fea87817e78d6a3cb37cc8f72c383169 [file] [log] [blame]
Philipp Tomsich1a18f302017-05-31 17:59:31 +02001/*
2 * Copyright (c) 2017 Theobroma Systems Design und Consulting GmbH
3 * Copyright (c) 2015 Google, Inc
4 * Copyright 2014 Rockchip Inc.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <display.h>
11#include <dm.h>
12#include <regmap.h>
13#include <video.h>
14#include <asm/hardware.h>
15#include <asm/io.h>
16#include "rk_vop.h"
17
18DECLARE_GLOBAL_DATA_PTR;
19
20static void rk3399_set_pin_polarity(struct udevice *dev,
21 enum vop_modes mode, u32 polarity)
22{
23 struct rk_vop_priv *priv = dev_get_priv(dev);
24 struct rk3288_vop *regs = priv->regs;
25
26 /*
27 * The RK3399 VOPs (v3.5 and v3.6) require a per-mode setting of
28 * the polarity configuration (in ctrl1).
29 */
30 switch (mode) {
31 case VOP_MODE_HDMI:
32 clrsetbits_le32(&regs->dsp_ctrl1,
33 M_RK3399_DSP_HDMI_POL,
34 V_RK3399_DSP_HDMI_POL(polarity));
35 break;
36
37 case VOP_MODE_EDP:
38 clrsetbits_le32(&regs->dsp_ctrl1,
39 M_RK3399_DSP_EDP_POL,
40 V_RK3399_DSP_EDP_POL(polarity));
41 break;
42
43 case VOP_MODE_MIPI:
44 clrsetbits_le32(&regs->dsp_ctrl1,
45 M_RK3399_DSP_MIPI_POL,
46 V_RK3399_DSP_MIPI_POL(polarity));
47 break;
48
49 case VOP_MODE_LVDS:
50 /* The RK3399 has neither parallel RGB nor LVDS output. */
51 default:
52 debug("%s: unsupported output mode %x\n", __func__, mode);
53 }
54}
55
56/*
57 * Try some common regulators. We should really get these from the
58 * device tree somehow.
59 */
60static const char * const rk3399_regulator_names[] = {
61 "vcc33_lcd"
62};
63
64static int rk3399_vop_probe(struct udevice *dev)
65{
66 /* Before relocation we don't need to do anything */
67 if (!(gd->flags & GD_FLG_RELOC))
68 return 0;
69
70 /* Probe regulators required for the RK3399 VOP */
71 rk_vop_probe_regulators(dev, rk3399_regulator_names,
72 ARRAY_SIZE(rk3399_regulator_names));
73
74 return rk_vop_probe(dev);
75}
76
77struct rkvop_driverdata rk3399_lit_driverdata = {
78 .set_pin_polarity = rk3399_set_pin_polarity,
79};
80
81struct rkvop_driverdata rk3399_big_driverdata = {
82 .features = VOP_FEATURE_OUTPUT_10BIT,
83 .set_pin_polarity = rk3399_set_pin_polarity,
84};
85
86static const struct udevice_id rk3399_vop_ids[] = {
87 { .compatible = "rockchip,rk3399-vop-big",
88 .data = (ulong)&rk3399_big_driverdata },
89 { .compatible = "rockchip,rk3399-vop-lit",
90 .data = (ulong)&rk3399_lit_driverdata },
91 { }
92};
93
94static const struct video_ops rk3399_vop_ops = {
95};
96
97U_BOOT_DRIVER(rk3399_vop) = {
98 .name = "rk3399_vop",
99 .id = UCLASS_VIDEO,
100 .of_match = rk3399_vop_ids,
101 .ops = &rk3399_vop_ops,
102 .bind = rk_vop_bind,
103 .probe = rk3399_vop_probe,
104 .priv_auto_alloc_size = sizeof(struct rk_vop_priv),
105};