| Ricardo Ribalda Delgado | 78ea77e | 2008-10-21 18:29:46 +0200 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2008 |
| 3 | * Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@uam.es |
| 4 | * This work has been supported by: QTechnology http://qtec.com/ |
| 5 | * based on xparameters-ml507.h by Xilinx |
| 6 | * |
| 7 | * This program is free software: you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation, either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program. If not, see <http://www.gnu.org/licenses/>. |
| 19 | */ |
| 20 | |
| 21 | #ifndef XPARAMETER_H |
| 22 | #define XPARAMETER_H |
| 23 | |
| 24 | #define XPAR_DDR2_SDRAM_MEM_BASEADDR 0x00000000 |
| 25 | #define XPAR_IIC_EEPROM_BASEADDR 0x81600000 |
| 26 | #define XPAR_INTC_0_BASEADDR 0x81800000 |
| 27 | #define XPAR_SPI_0_BASEADDR 0x83400000 |
| 28 | #define XPAR_UARTLITE_0_BASEADDR 0x84000000 |
| 29 | #define XPAR_FLASH_MEM0_BASEADDR 0xFE000000 |
| 30 | #define XPAR_PLB_CLOCK_FREQ_HZ 100000000 |
| 31 | #define XPAR_CORE_CLOCK_FREQ_HZ 400000000 |
| 32 | #define XPAR_INTC_MAX_NUM_INTR_INPUTS 13 |
| 33 | #define XPAR_UARTLITE_0_BAUDRATE 9600 |
| 34 | #define XPAR_SPI_0_NUM_TRANSFER_BITS 8 |
| 35 | |
| 36 | #endif |