Gitiles
Code Review Sign In
git01.mediatek.com / filogic / uboot / 489b25ac8771353bb52c8fdd41e89e035aed2a21 / . / arch / m68k / include / asm / immap_5272.h
blob: cd7b67256cfb5fde36ec086da2e2fe46812fb41b [file] [log] [blame]
Tom Rini10e47792018-05-06 17:58:06 -0400[diff] [blame]1/* SPDX-License-Identifier: GPL-2.0+ */
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]2/*
3 * MCF5272 Internal Memory Map
4 *
5 * Copyright (c) 2003 Josef Baumgartner <josef.baumgartner@telex.de>
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]6 */
7
8#ifndef __IMMAP_5272__
9#define __IMMAP_5272__
10
Jean-Christophe PLAGNIOL-VILLARD03836942008-10-16 15:01:15 +0200[diff] [blame]11#define MMAP_CFG (CONFIG_SYS_MBAR + 0x00000000)
12#define MMAP_INTC (CONFIG_SYS_MBAR + 0x00000020)
13#define MMAP_FBCS (CONFIG_SYS_MBAR + 0x00000040)
14#define MMAP_GPIO (CONFIG_SYS_MBAR + 0x00000080)
15#define MMAP_QSPI (CONFIG_SYS_MBAR + 0x000000A0)
16#define MMAP_PWM (CONFIG_SYS_MBAR + 0x000000C0)
17#define MMAP_DMA0 (CONFIG_SYS_MBAR + 0x000000E0)
18#define MMAP_UART0 (CONFIG_SYS_MBAR + 0x00000100)
19#define MMAP_UART1 (CONFIG_SYS_MBAR + 0x00000140)
20#define MMAP_SDRAM (CONFIG_SYS_MBAR + 0x00000180)
21#define MMAP_TMR0 (CONFIG_SYS_MBAR + 0x00000200)
22#define MMAP_TMR1 (CONFIG_SYS_MBAR + 0x00000220)
23#define MMAP_TMR2 (CONFIG_SYS_MBAR + 0x00000240)
24#define MMAP_TMR3 (CONFIG_SYS_MBAR + 0x00000260)
25#define MMAP_WDOG (CONFIG_SYS_MBAR + 0x00000280)
26#define MMAP_PLIC (CONFIG_SYS_MBAR + 0x00000300)
27#define MMAP_FEC (CONFIG_SYS_MBAR + 0x00000840)
28#define MMAP_USB (CONFIG_SYS_MBAR + 0x00001000)
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]29
TsiChung Liew7f1a0462008-10-21 10:03:07 +0000[diff] [blame]30#include <asm/coldfire/pwm.h>
31
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]32/* System configuration registers */
33typedef struct sys_ctrl {
34 uint sc_mbar;
35 ushort sc_scr;
36 ushort sc_spr;
37 uint sc_pmr;
38 char res1[2];
39 ushort sc_alpr;
40 uint sc_dir;
41 char res2[12];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]42} sysctrl_t;
43
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]44/* Interrupt module registers */
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]45typedef struct int_ctrl {
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]46 uint int_icr1;
47 uint int_icr2;
48 uint int_icr3;
49 uint int_icr4;
50 uint int_isr;
51 uint int_pitr;
52 uint int_piwr;
53 uchar res1[3];
54 uchar int_pivr;
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]55} intctrl_t;
56
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]57/* Chip select module registers */
58typedef struct cs_ctlr {
59 uint cs_br0;
60 uint cs_or0;
61 uint cs_br1;
62 uint cs_or1;
63 uint cs_br2;
64 uint cs_or2;
65 uint cs_br3;
66 uint cs_or3;
67 uint cs_br4;
68 uint cs_or4;
69 uint cs_br5;
70 uint cs_or5;
71 uint cs_br6;
72 uint cs_or6;
73 uint cs_br7;
74 uint cs_or7;
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]75} csctrl_t;
76
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]77/* GPIO port registers */
78typedef struct gpio_ctrl {
79 uint gpio_pacnt;
80 ushort gpio_paddr;
81 ushort gpio_padat;
82 uint gpio_pbcnt;
83 ushort gpio_pbddr;
84 ushort gpio_pbdat;
85 uchar res1[4];
86 ushort gpio_pcddr;
87 ushort gpio_pcdat;
88 uint gpio_pdcnt;
89 uchar res2[4];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]90} gpio_t;
91
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]92/* DMA module registers */
93typedef struct dma_ctrl {
94 ulong dma_dmr;
95 uchar res1[2];
96 ushort dma_dir;
97 ulong dma_dbcr;
98 ulong dma_dsar;
99 ulong dma_ddar;
100 uchar res2[12];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]101} dma_t;
102
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]103/* SDRAM controller registers, offset: 0x180 */
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]104typedef struct sdram_ctrl {
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]105 uchar res1[2];
106 ushort sdram_sdcr;
107 uchar res2[2];
108 ushort sdram_sdtr;
109 uchar res3[120];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]110} sdramctrl_t;
111
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]112/* Watchdog registers */
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]113typedef struct wdog_ctrl {
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]114 ushort wdog_wrrr;
115 ushort res1;
116 ushort wdog_wirr;
117 ushort res2;
118 ushort wdog_wcr;
119 ushort res3;
120 ushort wdog_wer;
121 uchar res4[114];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]122} wdog_t;
123
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]124/* PLIC module registers */
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]125typedef struct plic_ctrl {
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]126 ulong plic_p0b1rr;
127 ulong plic_p1b1rr;
128 ulong plic_p2b1rr;
129 ulong plic_p3b1rr;
130 ulong plic_p0b2rr;
131 ulong plic_p1b2rr;
132 ulong plic_p2b2rr;
133 ulong plic_p3b2rr;
134 uchar plic_p0drr;
135 uchar plic_p1drr;
136 uchar plic_p2drr;
137 uchar plic_p3drr;
138 uchar res1[4];
139 ulong plic_p0b1tr;
140 ulong plic_p1b1tr;
141 ulong plic_p2b1tr;
142 ulong plic_p3b1tr;
143 ulong plic_p0b2tr;
144 ulong plic_p1b2tr;
145 ulong plic_p2b2tr;
146 ulong plic_p3b2tr;
147 uchar plic_p0dtr;
148 uchar plic_p1dtr;
149 uchar plic_p2dtr;
150 uchar plic_p3dtr;
151 uchar res2[4];
152 ushort plic_p0cr;
153 ushort plic_p1cr;
154 ushort plic_p2cr;
155 ushort plic_p3cr;
156 ushort plic_p0icr;
157 ushort plic_p1icr;
158 ushort plic_p2icr;
159 ushort plic_p3icr;
160 ushort plic_p0gmr;
161 ushort plic_p1gmr;
162 ushort plic_p2gmr;
163 ushort plic_p3gmr;
164 ushort plic_p0gmt;
165 ushort plic_p1gmt;
166 ushort plic_p2gmt;
167 ushort plic_p3gmt;
168 uchar res3;
169 uchar plic_pgmts;
170 uchar plic_pgmta;
171 uchar res4;
172 uchar plic_p0gcir;
173 uchar plic_p1gcir;
174 uchar plic_p2gcir;
175 uchar plic_p3gcir;
176 uchar plic_p0gcit;
177 uchar plic_p1gcit;
178 uchar plic_p2gcit;
179 uchar plic_p3gcit;
180 uchar res5[3];
181 uchar plic_pgcitsr;
182 uchar res6[3];
183 uchar plic_pdcsr;
184 ushort plic_p0psr;
185 ushort plic_p1psr;
186 ushort plic_p2psr;
187 ushort plic_p3psr;
188 ushort plic_pasr;
189 uchar res7;
190 uchar plic_plcr;
191 ushort res8;
192 ushort plic_pdrqr;
193 ushort plic_p0sdr;
194 ushort plic_p1sdr;
195 ushort plic_p2sdr;
196 ushort plic_p3sdr;
197 ushort res9;
198 ushort plic_pcsr;
199 uchar res10[1184];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]200} plic_t;
201
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]202/* USB module registers */
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]203typedef struct usb {
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]204 ushort res1;
205 ushort usb_fnr;
206 ushort res2;
207 ushort usb_fnmr;
208 ushort res3;
209 ushort usb_rfmr;
210 ushort res4;
211 ushort usb_rfmmr;
212 uchar res5[3];
213 uchar usb_far;
214 ulong usb_asr;
215 ulong usb_drr1;
216 ulong usb_drr2;
217 ushort res6;
218 ushort usb_specr;
219 ushort res7;
220 ushort usb_ep0sr;
221 ulong usb_iep0cfg;
222 ulong usb_oep0cfg;
223 ulong usb_ep1cfg;
224 ulong usb_ep2cfg;
225 ulong usb_ep3cfg;
226 ulong usb_ep4cfg;
227 ulong usb_ep5cfg;
228 ulong usb_ep6cfg;
229 ulong usb_ep7cfg;
230 ulong usb_ep0ctl;
231 ushort res8;
232 ushort usb_ep1ctl;
233 ushort res9;
234 ushort usb_ep2ctl;
235 ushort res10;
236 ushort usb_ep3ctl;
237 ushort res11;
238 ushort usb_ep4ctl;
239 ushort res12;
240 ushort usb_ep5ctl;
241 ushort res13;
242 ushort usb_ep6ctl;
243 ushort res14;
244 ushort usb_ep7ctl;
245 ulong usb_ep0isr;
246 ushort res15;
247 ushort usb_ep1isr;
248 ushort res16;
249 ushort usb_ep2isr;
250 ushort res17;
251 ushort usb_ep3isr;
252 ushort res18;
253 ushort usb_ep4isr;
254 ushort res19;
255 ushort usb_ep5isr;
256 ushort res20;
257 ushort usb_ep6isr;
258 ushort res21;
259 ushort usb_ep7isr;
260 ulong usb_ep0imr;
261 ushort res22;
262 ushort usb_ep1imr;
263 ushort res23;
264 ushort usb_ep2imr;
265 ushort res24;
266 ushort usb_ep3imr;
267 ushort res25;
268 ushort usb_ep4imr;
269 ushort res26;
270 ushort usb_ep5imr;
271 ushort res27;
272 ushort usb_ep6imr;
273 ushort res28;
274 ushort usb_ep7imr;
275 ulong usb_ep0dr;
276 ulong usb_ep1dr;
277 ulong usb_ep2dr;
278 ulong usb_ep3dr;
279 ulong usb_ep4dr;
280 ulong usb_ep5dr;
281 ulong usb_ep6dr;
282 ulong usb_ep7dr;
283 ushort res29;
284 ushort usb_ep0dpr;
285 ushort res30;
286 ushort usb_ep1dpr;
287 ushort res31;
288 ushort usb_ep2dpr;
289 ushort res32;
290 ushort usb_ep3dpr;
291 ushort res33;
292 ushort usb_ep4dpr;
293 ushort res34;
294 ushort usb_ep5dpr;
295 ushort res35;
296 ushort usb_ep6dpr;
297 ushort res36;
298 ushort usb_ep7dpr;
299 uchar res37[788];
300 uchar usb_cfgram[1024];
wdenke65527f2004-02-12 00:47:09 +0000[diff] [blame]301} usb_t;
302
TsiChungLiew0e81abc2007-08-15 19:38:15 -0500[diff] [blame]303#endif /* __IMMAP_5272__ */