Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 1 | /* |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 2 | * (C) Copyright 2011 CompuLab, Ltd. |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 3 | * Mike Rapoport <mike@compulab.co.il> |
Igor Grinberg | bebedbf | 2011-04-18 17:48:31 -0400 | [diff] [blame] | 4 | * Igor Grinberg <grinberg@compulab.co.il> |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 5 | * |
| 6 | * Based on omap3_beagle.h |
| 7 | * (C) Copyright 2006-2008 |
| 8 | * Texas Instruments. |
| 9 | * Richard Woodruff <r-woodruff2@ti.com> |
| 10 | * Syed Mohammed Khasim <x0khasim@ti.com> |
| 11 | * |
Igor Grinberg | 05a96a4 | 2011-04-18 17:55:21 -0400 | [diff] [blame] | 12 | * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 13 | * |
Wolfgang Denk | d79de1d | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 14 | * SPDX-License-Identifier: GPL-2.0+ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 15 | */ |
| 16 | |
| 17 | #ifndef __CONFIG_H |
| 18 | #define __CONFIG_H |
| 19 | |
Albert ARIBAUD | bf9032a | 2016-01-27 08:46:11 +0100 | [diff] [blame] | 20 | #define CONFIG_SYS_CACHELINE_SIZE 64 |
| 21 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 22 | /* |
| 23 | * High Level Configuration Options |
| 24 | */ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 25 | #define CONFIG_OMAP /* in a TI OMAP core */ |
Marek Vasut | aede188 | 2012-07-21 05:02:23 +0000 | [diff] [blame] | 26 | #define CONFIG_OMAP_GPIO |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 27 | #define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */ |
Nishanth Menon | 3e46e3e | 2015-03-09 17:12:08 -0500 | [diff] [blame] | 28 | /* Common ARM Erratas */ |
| 29 | #define CONFIG_ARM_ERRATA_454179 |
| 30 | #define CONFIG_ARM_ERRATA_430973 |
| 31 | #define CONFIG_ARM_ERRATA_621766 |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 32 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 33 | #define CONFIG_SDRC /* The chip has SDRC controller */ |
| 34 | |
| 35 | #include <asm/arch/cpu.h> /* get chip and board defs */ |
Nishanth Menon | fa96c96 | 2015-03-09 17:12:04 -0500 | [diff] [blame] | 36 | #include <asm/arch/omap.h> |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 37 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 38 | /* Clock Defines */ |
| 39 | #define V_OSCK 26000000 /* Clock output from T2 */ |
| 40 | #define V_SCLK (V_OSCK >> 1) |
| 41 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 42 | #define CONFIG_MISC_INIT_R |
| 43 | |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 44 | #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
| 45 | #define CONFIG_SETUP_MEMORY_TAGS |
| 46 | #define CONFIG_INITRD_TAG |
| 47 | #define CONFIG_REVISION_TAG |
Nikita Kiryanov | b47cb9d | 2012-01-12 03:26:30 +0000 | [diff] [blame] | 48 | #define CONFIG_SERIAL_TAG |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 49 | |
| 50 | /* |
| 51 | * Size of malloc() pool |
| 52 | */ |
Igor Grinberg | f497f7f | 2012-05-24 04:01:21 +0000 | [diff] [blame] | 53 | #define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 54 | /* Sector */ |
| 55 | #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 56 | |
| 57 | /* |
| 58 | * Hardware drivers |
| 59 | */ |
| 60 | |
| 61 | /* |
| 62 | * NS16550 Configuration |
| 63 | */ |
| 64 | #define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */ |
| 65 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 66 | #define CONFIG_SYS_NS16550_SERIAL |
| 67 | #define CONFIG_SYS_NS16550_REG_SIZE (-4) |
| 68 | #define CONFIG_SYS_NS16550_CLK V_NS16550_CLK |
| 69 | |
| 70 | /* |
| 71 | * select serial console configuration |
| 72 | */ |
| 73 | #define CONFIG_CONS_INDEX 3 |
| 74 | #define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3 |
| 75 | #define CONFIG_SERIAL3 3 /* UART3 */ |
| 76 | |
| 77 | /* allow to overwrite serial and ethaddr */ |
| 78 | #define CONFIG_ENV_OVERWRITE |
| 79 | #define CONFIG_BAUDRATE 115200 |
| 80 | #define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\ |
| 81 | 115200} |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 82 | |
| 83 | #define CONFIG_GENERIC_MMC |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 84 | #define CONFIG_DOS_PARTITION |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 85 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 86 | /* USB */ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 87 | #define CONFIG_USB_OMAP3 |
Nikita Kiryanov | 9f957be | 2012-12-02 13:59:19 +0200 | [diff] [blame] | 88 | #define CONFIG_USB_EHCI |
| 89 | #define CONFIG_USB_EHCI_OMAP |
Paul Kocialkowski | f34dfcb | 2015-08-04 17:04:06 +0200 | [diff] [blame] | 90 | #define CONFIG_USB_MUSB_UDC |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 91 | #define CONFIG_TWL4030_USB |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 92 | |
| 93 | /* USB device configuration */ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 94 | #define CONFIG_USB_DEVICE |
| 95 | #define CONFIG_USB_TTY |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 96 | |
| 97 | /* commands to include */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 98 | #define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */ |
| 99 | #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */ |
Igor Grinberg | 2396460 | 2013-04-22 01:06:55 +0000 | [diff] [blame] | 100 | #define CONFIG_MTD_PARTITIONS |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 101 | #define MTDIDS_DEFAULT "nand0=nand" |
| 102 | #define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\ |
Igor Grinberg | 2396460 | 2013-04-22 01:06:55 +0000 | [diff] [blame] | 103 | "1920k(u-boot),256k(u-boot-env),"\ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 104 | "4m(kernel),-(fs)" |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 105 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 106 | #define CONFIG_CMD_NAND /* NAND support */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 107 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 108 | #define CONFIG_SYS_NO_FLASH |
Heiko Schocher | f53f2b8 | 2013-10-22 11:03:18 +0200 | [diff] [blame] | 109 | #define CONFIG_SYS_I2C |
| 110 | #define CONFIG_SYS_OMAP24_I2C_SPEED 100000 |
| 111 | #define CONFIG_SYS_OMAP24_I2C_SLAVE 1 |
| 112 | #define CONFIG_SYS_I2C_OMAP34XX |
Nikita Kiryanov | b47cb9d | 2012-01-12 03:26:30 +0000 | [diff] [blame] | 113 | #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 |
| 114 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
Nikita Kiryanov | a8eeecb | 2014-08-20 15:08:52 +0300 | [diff] [blame] | 115 | #define CONFIG_SYS_I2C_EEPROM_BUS 0 |
Nikita Kiryanov | da4da30 | 2012-04-02 02:29:31 +0000 | [diff] [blame] | 116 | #define CONFIG_I2C_MULTI_BUS |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 117 | |
| 118 | /* |
| 119 | * TWL4030 |
| 120 | */ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 121 | #define CONFIG_TWL4030_POWER |
| 122 | #define CONFIG_TWL4030_LED |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 123 | |
| 124 | /* |
| 125 | * Board NAND Info. |
| 126 | */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 127 | #define CONFIG_NAND_OMAP_GPMC |
| 128 | #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ |
| 129 | /* to access nand */ |
| 130 | #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */ |
| 131 | /* to access nand at */ |
| 132 | /* CS0 */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 133 | #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */ |
| 134 | /* devices */ |
Stefan Roese | 55503c1 | 2014-03-11 17:04:45 +0100 | [diff] [blame] | 135 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 136 | /* Environment information */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 137 | #define CONFIG_EXTRA_ENV_SETTINGS \ |
| 138 | "loadaddr=0x82000000\0" \ |
| 139 | "usbtty=cdc_acm\0" \ |
Nikita Kiryanov | e4361e9 | 2013-12-11 18:04:40 +0200 | [diff] [blame] | 140 | "console=ttyO2,115200n8\0" \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 141 | "mpurate=500\0" \ |
| 142 | "vram=12M\0" \ |
| 143 | "dvimode=1024x768MR-16@60\0" \ |
| 144 | "defaultdisplay=dvi\0" \ |
| 145 | "mmcdev=0\0" \ |
| 146 | "mmcroot=/dev/mmcblk0p2 rw\0" \ |
Igor Grinberg | 2396460 | 2013-04-22 01:06:55 +0000 | [diff] [blame] | 147 | "mmcrootfstype=ext4 rootwait\0" \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 148 | "nandroot=/dev/mtdblock4 rw\0" \ |
Igor Grinberg | 2396460 | 2013-04-22 01:06:55 +0000 | [diff] [blame] | 149 | "nandrootfstype=ubifs\0" \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 150 | "mmcargs=setenv bootargs console=${console} " \ |
| 151 | "mpurate=${mpurate} " \ |
| 152 | "vram=${vram} " \ |
| 153 | "omapfb.mode=dvi:${dvimode} " \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 154 | "omapdss.def_disp=${defaultdisplay} " \ |
| 155 | "root=${mmcroot} " \ |
| 156 | "rootfstype=${mmcrootfstype}\0" \ |
| 157 | "nandargs=setenv bootargs console=${console} " \ |
| 158 | "mpurate=${mpurate} " \ |
| 159 | "vram=${vram} " \ |
| 160 | "omapfb.mode=dvi:${dvimode} " \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 161 | "omapdss.def_disp=${defaultdisplay} " \ |
| 162 | "root=${nandroot} " \ |
| 163 | "rootfstype=${nandrootfstype}\0" \ |
| 164 | "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ |
| 165 | "bootscript=echo Running bootscript from mmc ...; " \ |
| 166 | "source ${loadaddr}\0" \ |
| 167 | "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ |
| 168 | "mmcboot=echo Booting from mmc ...; " \ |
| 169 | "run mmcargs; " \ |
| 170 | "bootm ${loadaddr}\0" \ |
| 171 | "nandboot=echo Booting from nand ...; " \ |
| 172 | "run nandargs; " \ |
Igor Grinberg | 2396460 | 2013-04-22 01:06:55 +0000 | [diff] [blame] | 173 | "nand read ${loadaddr} 2a0000 400000; " \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 174 | "bootm ${loadaddr}\0" \ |
| 175 | |
| 176 | #define CONFIG_BOOTCOMMAND \ |
Andrew Bradford | e1c7c8a | 2012-10-01 05:06:52 +0000 | [diff] [blame] | 177 | "mmc dev ${mmcdev}; if mmc rescan; then " \ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 178 | "if run loadbootscript; then " \ |
| 179 | "run bootscript; " \ |
| 180 | "else " \ |
| 181 | "if run loaduimage; then " \ |
| 182 | "run mmcboot; " \ |
| 183 | "else run nandboot; " \ |
| 184 | "fi; " \ |
| 185 | "fi; " \ |
| 186 | "else run nandboot; fi" |
| 187 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 188 | /* |
| 189 | * Miscellaneous configurable options |
| 190 | */ |
Igor Grinberg | c73b4f1 | 2011-04-18 17:48:28 -0400 | [diff] [blame] | 191 | #define CONFIG_AUTO_COMPLETE |
| 192 | #define CONFIG_CMDLINE_EDITING |
| 193 | #define CONFIG_TIMESTAMP |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 194 | #define CONFIG_SYS_AUTOLOAD "no" |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 195 | #define CONFIG_SYS_LONGHELP /* undef to save memory */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 196 | #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ |
| 197 | /* Print Buffer Size */ |
| 198 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 199 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 200 | #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ |
| 201 | /* Boot Argument Buffer Size */ |
| 202 | #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE) |
| 203 | |
| 204 | #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */ |
| 205 | /* works on */ |
| 206 | #define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \ |
| 207 | 0x01F00000) /* 31MB */ |
| 208 | |
| 209 | #define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */ |
| 210 | /* load address */ |
| 211 | |
| 212 | /* |
| 213 | * OMAP3 has 12 GP timers, they can be driven by the system clock |
| 214 | * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK). |
| 215 | * This rate is divided by a local divisor. |
| 216 | */ |
| 217 | #define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2) |
| 218 | #define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 219 | |
| 220 | /*----------------------------------------------------------------------- |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 221 | * Physical Memory Map |
| 222 | */ |
| 223 | #define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */ |
| 224 | #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0 |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 225 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 226 | /*----------------------------------------------------------------------- |
| 227 | * FLASH and environment organization |
| 228 | */ |
| 229 | |
| 230 | /* **** PISMO SUPPORT *** */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 231 | /* Monitor at start of flash */ |
| 232 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE |
Igor Grinberg | 315ef7e | 2012-10-07 01:17:34 +0000 | [diff] [blame] | 233 | #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */ |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 234 | |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 235 | #define CONFIG_ENV_IS_IN_NAND |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 236 | #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ |
Luca Ceresoli | 9783a2c | 2011-04-20 11:02:05 -0400 | [diff] [blame] | 237 | #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 238 | #define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET |
| 239 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 240 | #if defined(CONFIG_CMD_NET) |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 241 | #define CONFIG_SMC911X |
| 242 | #define CONFIG_SMC911X_32_BIT |
Igor Grinberg | 05a96a4 | 2011-04-18 17:55:21 -0400 | [diff] [blame] | 243 | #define CM_T3X_SMC911X_BASE 0x2C000000 |
| 244 | #define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20)) |
| 245 | #define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 246 | #endif /* (CONFIG_CMD_NET) */ |
| 247 | |
| 248 | /* additions for new relocation code, must be added to all boards */ |
| 249 | #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 |
| 250 | #define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800 |
| 251 | #define CONFIG_SYS_INIT_RAM_SIZE 0x800 |
| 252 | #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ |
| 253 | CONFIG_SYS_INIT_RAM_SIZE - \ |
| 254 | GENERATED_GBL_DATA_SIZE) |
| 255 | |
Igor Grinberg | d2367bc | 2011-04-18 17:54:33 -0400 | [diff] [blame] | 256 | /* Status LED */ |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 257 | #define CONFIG_STATUS_LED /* Status LED enabled */ |
| 258 | #define CONFIG_BOARD_SPECIFIC_LED |
Igor Grinberg | 5ef7b86 | 2013-11-06 16:39:47 +0200 | [diff] [blame] | 259 | #define CONFIG_GPIO_LED |
| 260 | #define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */ |
| 261 | #define GREEN_LED_DEV 0 |
| 262 | #define STATUS_LED_BIT GREEN_LED_GPIO |
Igor Grinberg | d2367bc | 2011-04-18 17:54:33 -0400 | [diff] [blame] | 263 | #define STATUS_LED_STATE STATUS_LED_ON |
| 264 | #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) |
Igor Grinberg | 5ef7b86 | 2013-11-06 16:39:47 +0200 | [diff] [blame] | 265 | #define STATUS_LED_BOOT GREEN_LED_DEV |
Igor Grinberg | d2367bc | 2011-04-18 17:54:33 -0400 | [diff] [blame] | 266 | |
Nikita Kiryanov | a6b2b73 | 2013-02-24 06:19:23 +0000 | [diff] [blame] | 267 | #define CONFIG_SPLASHIMAGE_GUARD |
| 268 | |
Igor Grinberg | d2367bc | 2011-04-18 17:54:33 -0400 | [diff] [blame] | 269 | /* GPIO banks */ |
| 270 | #ifdef CONFIG_STATUS_LED |
Nikita Kiryanov | 0630b03 | 2012-01-02 04:01:30 +0000 | [diff] [blame] | 271 | #define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */ |
Igor Grinberg | d2367bc | 2011-04-18 17:54:33 -0400 | [diff] [blame] | 272 | #endif |
| 273 | |
Nikita Kiryanov | 2247eb4 | 2013-01-30 21:39:58 +0000 | [diff] [blame] | 274 | /* Display Configuration */ |
| 275 | #define CONFIG_OMAP3_GPIO_2 |
Nikita Kiryanov | a6db624 | 2013-12-31 12:55:15 +0200 | [diff] [blame] | 276 | #define CONFIG_OMAP3_GPIO_5 |
Nikita Kiryanov | 2247eb4 | 2013-01-30 21:39:58 +0000 | [diff] [blame] | 277 | #define CONFIG_VIDEO_OMAP3 |
| 278 | #define LCD_BPP LCD_COLOR16 |
| 279 | |
Nikita Kiryanov | c4a295a | 2012-12-22 21:03:48 +0000 | [diff] [blame] | 280 | #define CONFIG_SPLASH_SCREEN |
Nikita Kiryanov | 7f9ceea | 2015-01-14 10:42:54 +0200 | [diff] [blame] | 281 | #define CONFIG_SPLASH_SOURCE |
Nikita Kiryanov | c4a295a | 2012-12-22 21:03:48 +0000 | [diff] [blame] | 282 | #define CONFIG_CMD_BMP |
| 283 | #define CONFIG_BMP_16BPP |
Nikita Kiryanov | 25da152 | 2013-10-16 17:23:29 +0300 | [diff] [blame] | 284 | #define CONFIG_SCF0403_LCD |
| 285 | |
| 286 | #define CONFIG_OMAP3_SPI |
Nikita Kiryanov | 2247eb4 | 2013-01-30 21:39:58 +0000 | [diff] [blame] | 287 | |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 288 | /* Defines for SPL */ |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 289 | #define CONFIG_SPL_FRAMEWORK |
| 290 | #define CONFIG_SPL_NAND_SIMPLE |
| 291 | |
Paul Kocialkowski | 341e8cd | 2014-11-08 23:14:55 +0100 | [diff] [blame] | 292 | #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 |
Guillaume GARDET | 602a16c | 2014-10-15 17:53:11 +0200 | [diff] [blame] | 293 | #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 294 | |
| 295 | #define CONFIG_SPL_BOARD_INIT |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 296 | #define CONFIG_SPL_NAND_BASE |
| 297 | #define CONFIG_SPL_NAND_DRIVERS |
| 298 | #define CONFIG_SPL_NAND_ECC |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 299 | #define CONFIG_SPL_OMAP3_ID_NAND |
Tom Rini | 28eec37 | 2016-11-07 21:34:54 -0500 | [diff] [blame] | 300 | #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 301 | |
| 302 | /* NAND boot config */ |
| 303 | #define CONFIG_SYS_NAND_5_ADDR_CYCLE |
| 304 | #define CONFIG_SYS_NAND_PAGE_COUNT 64 |
| 305 | #define CONFIG_SYS_NAND_PAGE_SIZE 2048 |
| 306 | #define CONFIG_SYS_NAND_OOBSIZE 64 |
| 307 | #define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024) |
| 308 | #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS |
| 309 | /* |
| 310 | * Use the ECC/OOB layout from omap_gpmc.h that matches your chip: |
| 311 | * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT |
| 312 | */ |
| 313 | #define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \ |
| 314 | 10, 11, 12 } |
| 315 | #define CONFIG_SYS_NAND_ECCSIZE 512 |
| 316 | #define CONFIG_SYS_NAND_ECCBYTES 3 |
| 317 | #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW |
| 318 | |
| 319 | #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE |
| 320 | #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 |
| 321 | |
| 322 | #define CONFIG_SPL_TEXT_BASE 0x40200800 |
Tom Rini | cfff4aa | 2016-08-26 13:30:43 -0400 | [diff] [blame] | 323 | #define CONFIG_SPL_MAX_SIZE (SRAM_SCRATCH_SPACE_ADDR - \ |
| 324 | CONFIG_SPL_TEXT_BASE) |
Stefan Roese | 8ef10bd | 2013-12-04 13:54:18 +0100 | [diff] [blame] | 325 | |
| 326 | /* |
| 327 | * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the |
| 328 | * older x-loader implementations. And move the BSS area so that it |
| 329 | * doesn't overlap with TEXT_BASE. |
| 330 | */ |
| 331 | #define CONFIG_SYS_TEXT_BASE 0x80008000 |
| 332 | #define CONFIG_SPL_BSS_START_ADDR 0x80100000 |
| 333 | #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */ |
| 334 | |
| 335 | #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 |
| 336 | #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 |
| 337 | |
Nikita Kiryanov | d655478 | 2016-04-16 17:55:09 +0300 | [diff] [blame] | 338 | /* EEPROM */ |
| 339 | #define CONFIG_CMD_EEPROM |
| 340 | #define CONFIG_ENV_EEPROM_IS_ON_I2C |
| 341 | #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 |
| 342 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 4 |
| 343 | #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 5 |
| 344 | #define CONFIG_SYS_EEPROM_SIZE 256 |
| 345 | |
| 346 | #define CONFIG_CMD_EEPROM_LAYOUT |
| 347 | #define CONFIG_EEPROM_LAYOUT_HELP_STRING "legacy, v1, v2, v3" |
| 348 | |
Mike Rapoport | 8abe730 | 2010-12-18 17:43:19 -0500 | [diff] [blame] | 349 | #endif /* __CONFIG_H */ |