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Chander Kashyap34076a02012-02-05 23:01:46 +00001/*
2 * (C) Copyright 2012 Samsung Electronics
3 *
Wolfgang Denkd79de1d2013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Chander Kashyap34076a02012-02-05 23:01:46 +00005 */
6
7#ifndef __TZPC_H_
8#define __TZPC_H_
9
10#ifndef __ASSEMBLY__
Chander Kashyap8f223782012-03-14 17:34:02 +000011struct exynos_tzpc {
Chander Kashyap34076a02012-02-05 23:01:46 +000012 unsigned int r0size;
13 char res1[0x7FC];
14 unsigned int decprot0stat;
15 unsigned int decprot0set;
16 unsigned int decprot0clr;
17 unsigned int decprot1stat;
18 unsigned int decprot1set;
19 unsigned int decprot1clr;
20 unsigned int decprot2stat;
21 unsigned int decprot2set;
22 unsigned int decprot2clr;
23 unsigned int decprot3stat;
24 unsigned int decprot3set;
25 unsigned int decprot3clr;
26 char res2[0x7B0];
27 unsigned int periphid0;
28 unsigned int periphid1;
29 unsigned int periphid2;
30 unsigned int periphid3;
31 unsigned int pcellid0;
32 unsigned int pcellid1;
33 unsigned int pcellid2;
34 unsigned int pcellid3;
35};
Inderpal Singhb472f582013-04-04 23:09:19 +000036
Inderpal Singh848048a2013-04-04 23:09:20 +000037#define EXYNOS4_NR_TZPC_BANKS 6
38#define EXYNOS5_NR_TZPC_BANKS 10
Inderpal Singhb472f582013-04-04 23:09:19 +000039
Inderpal Singh848048a2013-04-04 23:09:20 +000040/* TZPC : Register Offsets */
Inderpal Singhb472f582013-04-04 23:09:19 +000041#define TZPC_BASE_OFFSET 0x10000
42
43/*
44 * TZPC Register Value :
45 * R0SIZE: 0x0 : Size of secured ram
46 */
47#define R0SIZE 0x0
48
49/*
50 * TZPC Decode Protection Register Value :
51 * DECPROTXSET: 0xFF : Set Decode region to non-secure
52 */
53#define DECPROTXSET 0xFF
54void tzpc_init(void);
55
Chander Kashyap34076a02012-02-05 23:01:46 +000056#endif
57
58#endif