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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
Stefano Babic1c2b3ac2011-01-20 07:49:52 +00002/*
3 * (C) Copyright 2007
4 * Sascha Hauer, Pengutronix
5 *
6 * (C) Copyright 2008-2009 Freescale Semiconductor, Inc.
Stefano Babic1c2b3ac2011-01-20 07:49:52 +00007 */
8
9#include <common.h>
Simon Glass97589732020-05-10 11:40:02 -060010#include <init.h>
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000011#include <asm/io.h>
12#include <asm/arch/imx-regs.h>
Benoît Thébaudeau6ce2db02012-08-21 11:07:54 +000013#include <asm/arch/crm_regs.h>
Simon Glass6b9f0102020-05-10 11:40:06 -060014#include <asm/ptrace.h>
Stefano Babicb36049c2012-02-04 12:56:50 +010015
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000016/* General purpose timers bitfields */
17#define GPTCR_SWR (1<<15) /* Software reset */
18#define GPTCR_FRR (1<<9) /* Freerun / restart */
Benoît Thébaudeau6ce2db02012-08-21 11:07:54 +000019#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000020#define GPTCR_TEN (1) /* Timer enable */
Stefano Babicb36049c2012-02-04 12:56:50 +010021
Benoît Thébaudeau6ce2db02012-08-21 11:07:54 +000022/*
Benoît Thébaudeau6ce2db02012-08-21 11:07:54 +000023 * nothing really to do with interrupts, just starts up a counter.
24 * The 32KHz 32-bit timer overruns in 134217 seconds
25 */
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000026int timer_init(void)
27{
28 int i;
29 struct gpt_regs *gpt = (struct gpt_regs *)GPT1_BASE_ADDR;
Benoît Thébaudeau6ce2db02012-08-21 11:07:54 +000030 struct ccm_regs *ccm = (struct ccm_regs *)CCM_BASE_ADDR;
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000031
32 /* setup GP Timer 1 */
33 writel(GPTCR_SWR, &gpt->ctrl);
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000034
Benoît Thébaudeau6ce2db02012-08-21 11:07:54 +000035 writel(readl(&ccm->cgr1) | 3 << MXC_CCM_CGR1_GPT_OFFSET, &ccm->cgr1);
36
37 for (i = 0; i < 100; i++)
38 writel(0, &gpt->ctrl); /* We have no udelay by now */
39 writel(0, &gpt->pre); /* prescaler = 1 */
40 /* Freerun Mode, 32KHz input */
41 writel(readl(&gpt->ctrl) | GPTCR_CLKSOURCE_32 | GPTCR_FRR,
42 &gpt->ctrl);
43 writel(readl(&gpt->ctrl) | GPTCR_TEN, &gpt->ctrl);
Stefano Babic1c2b3ac2011-01-20 07:49:52 +000044
45 return 0;
46}