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Soeren Moch358ebc32014-11-03 13:57:01 +01001/*
2 * Copyright (C) 2014 Soeren Moch <smoch@web.de>
3 *
4 * Configuration settings for the TBS2910 MatrixARM board.
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#ifndef __TBS2910_CONFIG_H
10#define __TBS2910_CONFIG_H
11
12#include "mx6_common.h"
Soeren Moch358ebc32014-11-03 13:57:01 +010013
14/* General configuration */
Soeren Moch358ebc32014-11-03 13:57:01 +010015#define CONFIG_SYS_THUMB_BUILD
16
17#define CONFIG_MACH_TYPE 3980
18
Soeren Moch358ebc32014-11-03 13:57:01 +010019#define CONFIG_SYS_HZ 1000
20
Adrian Alonsoce08c362015-09-02 13:54:13 -050021#define CONFIG_IMX_THERMAL
Soeren Moch3cf52ab2015-05-29 20:32:41 +020022
Soeren Moch358ebc32014-11-03 13:57:01 +010023/* Physical Memory Map */
24#define CONFIG_NR_DRAM_BANKS 1
25#define CONFIG_SYS_SDRAM_BASE MMDC0_ARB_BASE_ADDR
26
27#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
28#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
29#define CONFIG_SYS_INIT_SP_OFFSET \
30 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
31#define CONFIG_SYS_INIT_SP_ADDR \
32 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
33
34#define CONFIG_SYS_MALLOC_LEN (128 * 1024 * 1024)
35
36#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
37#define CONFIG_SYS_MEMTEST_END \
38 (CONFIG_SYS_MEMTEST_START + 500 * 1024 * 1024)
39
Soeren Moch95b5a332016-09-21 13:16:21 +020040#define CONFIG_SYS_BOOTMAPSZ 0x10000000
Soeren Moch358ebc32014-11-03 13:57:01 +010041
42/* Serial console */
43#define CONFIG_MXC_UART
44#define CONFIG_MXC_UART_BASE UART1_BASE /* select UART1/UART2 */
45#define CONFIG_BAUDRATE 115200
46
Soeren Moch358ebc32014-11-03 13:57:01 +010047#define CONFIG_CONS_INDEX 1
48
49/* *** Command definition *** */
Soeren Moch358ebc32014-11-03 13:57:01 +010050#define CONFIG_CMD_BMODE
Soeren Moch358ebc32014-11-03 13:57:01 +010051
52/* Filesystems / image support */
Soeren Moch358ebc32014-11-03 13:57:01 +010053
54/* MMC */
Soeren Moch358ebc32014-11-03 13:57:01 +010055#define CONFIG_SYS_FSL_USDHC_NUM 3
56#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR
Soeren Mochafccf7a2015-05-05 23:09:21 +020057#define CONFIG_SUPPORT_EMMC_BOOT
Soeren Moch358ebc32014-11-03 13:57:01 +010058
59/* Ethernet */
60#define CONFIG_FEC_MXC
Soeren Moch358ebc32014-11-03 13:57:01 +010061#define CONFIG_FEC_MXC
62#define CONFIG_MII
63#define IMX_FEC_BASE ENET_BASE_ADDR
64#define CONFIG_FEC_XCV_TYPE RGMII
65#define CONFIG_ETHPRIME "FEC"
66#define CONFIG_FEC_MXC_PHYADDR 4
67#define CONFIG_PHYLIB
68#define CONFIG_PHY_ATHEROS
69
70/* Framebuffer */
Soeren Moch358ebc32014-11-03 13:57:01 +010071#ifdef CONFIG_VIDEO
72#define CONFIG_VIDEO_IPUV3
73#define CONFIG_IPUV3_CLK 260000000
Soeren Moch358ebc32014-11-03 13:57:01 +010074#define CONFIG_VIDEO_BMP_RLE8
75#define CONFIG_IMX_HDMI
76#define CONFIG_IMX_VIDEO_SKIP
77#define CONFIG_CMD_HDMIDETECT
78#endif
79
80/* PCI */
81#define CONFIG_CMD_PCI
82#ifdef CONFIG_CMD_PCI
Soeren Moch358ebc32014-11-03 13:57:01 +010083#define CONFIG_PCI_SCAN_SHOW
84#define CONFIG_PCIE_IMX
85#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
86#endif
87
88/* SATA */
89#define CONFIG_CMD_SATA
90#ifdef CONFIG_CMD_SATA
91#define CONFIG_DWC_AHSATA
92#define CONFIG_SYS_SATA_MAX_DEVICE 1
93#define CONFIG_DWC_AHSATA_PORT_ID 0
94#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
95#define CONFIG_LBA48
96#define CONFIG_LIBATA
97#endif
98
99/* USB */
Soeren Moch358ebc32014-11-03 13:57:01 +0100100#ifdef CONFIG_CMD_USB
101#define CONFIG_USB_EHCI
102#define CONFIG_USB_EHCI_MX6
103#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
Soeren Moch78984d92015-05-05 23:09:18 +0200104#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
Soeren Moch358ebc32014-11-03 13:57:01 +0100105#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
Soeren Moch67a45932015-02-26 19:50:02 +0100106#ifdef CONFIG_CMD_USB_MASS_STORAGE
Soeren Moch67a45932015-02-26 19:50:02 +0100107#define CONFIG_USBD_HS
Paul Kocialkowski045d6052015-06-12 19:56:58 +0200108#define CONFIG_USB_FUNCTION_MASS_STORAGE
Soeren Moch67a45932015-02-26 19:50:02 +0100109#endif /* CONFIG_CMD_USB_MASS_STORAGE */
Soeren Moch358ebc32014-11-03 13:57:01 +0100110#ifdef CONFIG_USB_KEYBOARD
Soeren Mocha9010502014-11-27 21:21:44 +0100111#define CONFIG_SYS_USB_EVENT_POLL_VIA_INT_QUEUE
Soeren Moch3bbe1c42015-05-05 23:09:19 +0200112#define CONFIG_PREBOOT \
Soeren Moch9a3a5312016-07-27 16:07:16 +0200113 "usb start; " \
Soeren Moch3bbe1c42015-05-05 23:09:19 +0200114 "if hdmidet; then " \
Soeren Moch9a3a5312016-07-27 16:07:16 +0200115 "run set_con_hdmi; " \
Soeren Moch3bbe1c42015-05-05 23:09:19 +0200116 "else " \
117 "run set_con_serial; " \
118 "fi;"
Soeren Moch358ebc32014-11-03 13:57:01 +0100119#endif /* CONFIG_USB_KEYBOARD */
120#endif /* CONFIG_CMD_USB */
121
122/* RTC */
123#define CONFIG_CMD_DATE
124#ifdef CONFIG_CMD_DATE
Soeren Moch358ebc32014-11-03 13:57:01 +0100125#define CONFIG_RTC_DS1307
126#define CONFIG_SYS_RTC_BUS_NUM 2
127#endif
128
129/* I2C */
Soeren Moch358ebc32014-11-03 13:57:01 +0100130#ifdef CONFIG_CMD_I2C
131#define CONFIG_SYS_I2C
132#define CONFIG_SYS_I2C_MXC
Albert ARIBAUD \\(3ADEV\\)eb943872015-09-21 22:43:38 +0200133#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
134#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
York Sunf1a52162015-03-20 10:20:40 -0700135#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
Soeren Moch358ebc32014-11-03 13:57:01 +0100136#define CONFIG_SYS_I2C_SPEED 100000
137#define CONFIG_I2C_EDID
138#endif
139
Peter Robinson4b671502015-05-22 17:30:45 +0100140/* Environment organization */
Soeren Moch358ebc32014-11-03 13:57:01 +0100141#define CONFIG_ENV_IS_IN_MMC
Soeren Moch4188b602016-02-04 14:41:16 +0100142#define CONFIG_SYS_MMC_ENV_DEV 2 /* overwritten on SD boot */
143#define CONFIG_SYS_MMC_ENV_PART 1 /* overwritten on SD boot */
Soeren Moch358ebc32014-11-03 13:57:01 +0100144#define CONFIG_ENV_SIZE (8 * 1024)
145#define CONFIG_ENV_OFFSET (384 * 1024)
146#define CONFIG_ENV_OVERWRITE
147
148#define CONFIG_EXTRA_ENV_SETTINGS \
149 "bootargs_mmc1=console=ttymxc0,115200 di0_primary console=tty1\0" \
150 "bootargs_mmc2=video=mxcfb0:dev=hdmi,1920x1080M@60 " \
151 "video=mxcfb1:off video=mxcfb2:off fbmem=28M\0" \
152 "bootargs_mmc3=root=/dev/mmcblk0p1 rootwait consoleblank=0 quiet\0" \
153 "bootargs_mmc=setenv bootargs ${bootargs_mmc1} ${bootargs_mmc2} " \
154 "${bootargs_mmc3}\0" \
155 "bootargs_upd=setenv bootargs console=ttymxc0,115200 " \
156 "rdinit=/sbin/init enable_wait_mode=off\0" \
157 "bootcmd_mmc=run bootargs_mmc; mmc dev 2; " \
Soeren Moch0b726332015-10-01 22:48:04 +0200158 "mmc read 0x10800000 0x800 0x4000; bootm 0x10800000\0" \
Soeren Moch358ebc32014-11-03 13:57:01 +0100159 "bootcmd_up1=load mmc 1 0x10800000 uImage\0" \
160 "bootcmd_up2=load mmc 1 0x10d00000 uramdisk.img; " \
161 "run bootargs_upd; " \
162 "bootm 0x10800000 0x10d00000\0" \
163 "console=ttymxc0\0" \
164 "fan=gpio set 92\0" \
Soeren Moch9a3a5312016-07-27 16:07:16 +0200165 "set_con_serial=setenv stdout serial; " \
Soeren Moch3bbe1c42015-05-05 23:09:19 +0200166 "setenv stderr serial;\0" \
Soeren Moch9a3a5312016-07-27 16:07:16 +0200167 "set_con_hdmi=setenv stdout serial,vga; " \
168 "setenv stderr serial,vga;\0" \
Soeren Mochfe60b4f2016-07-27 16:07:17 +0200169 "stderr=serial,vga;\0" \
170 "stdin=serial,usbkbd;\0" \
171 "stdout=serial,vga;\0"
Soeren Moch358ebc32014-11-03 13:57:01 +0100172
173#define CONFIG_BOOTCOMMAND \
174 "mmc rescan; " \
175 "if run bootcmd_up1; then " \
176 "run bootcmd_up2; " \
177 "else " \
178 "run bootcmd_mmc; " \
179 "fi"
180
181#endif /* __TBS2910_CONFIG_H * */