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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
TsiChungLiew8999e6b2008-01-15 13:37:34 -06002/*
3 *
Alison Wang027f76f2012-03-26 21:49:07 +00004 * Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
TsiChungLiew8999e6b2008-01-15 13:37:34 -06005 * TsiChung Liew (Tsi-Chung.Liew@freescale.com)
TsiChungLiew8999e6b2008-01-15 13:37:34 -06006 */
7
8/* CPU specific interrupt routine */
9#include <common.h>
10#include <asm/immap.h>
Alison Wang027f76f2012-03-26 21:49:07 +000011#include <asm/io.h>
TsiChungLiew8999e6b2008-01-15 13:37:34 -060012
13int interrupt_init(void)
14{
Alison Wang027f76f2012-03-26 21:49:07 +000015 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060016
17 /* Make sure all interrupts are disabled */
Alison Wang027f76f2012-03-26 21:49:07 +000018 setbits_be32(&intp->imrh0, 0xffffffff);
19 setbits_be32(&intp->imrl0, 0xffffffff);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060020
21 enable_interrupts();
22
23 return 0;
24}
25
26#if defined(CONFIG_SLTTMR)
27void dtimer_intr_setup(void)
28{
Alison Wang027f76f2012-03-26 21:49:07 +000029 int0_t *intp = (int0_t *) (CONFIG_SYS_INTR_BASE);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060030
Alison Wang027f76f2012-03-26 21:49:07 +000031 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI);
32 clrbits_be32(&intp->imrh0, CONFIG_SYS_TMRINTR_MASK);
TsiChungLiew8999e6b2008-01-15 13:37:34 -060033}
34#endif