Tom Rini | 10e4779 | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Marek Vasut | 23e239a | 2017-11-25 23:24:01 +0100 | [diff] [blame] | 2 | /* |
| 3 | * Renesas RCar Gen3 memory map tables |
| 4 | * |
| 5 | * Copyright (C) 2017 Marek Vasut <marek.vasut@gmail.com> |
Marek Vasut | 23e239a | 2017-11-25 23:24:01 +0100 | [diff] [blame] | 6 | */ |
| 7 | |
| 8 | #include <common.h> |
| 9 | #include <asm/armv8/mmu.h> |
| 10 | |
Marek Vasut | a5abacc | 2018-02-15 13:19:33 +0100 | [diff] [blame] | 11 | static struct mm_region gen3_mem_map[] = { |
Marek Vasut | 23e239a | 2017-11-25 23:24:01 +0100 | [diff] [blame] | 12 | { |
| 13 | .virt = 0x0UL, |
| 14 | .phys = 0x0UL, |
Marek Vasut | a5abacc | 2018-02-15 13:19:33 +0100 | [diff] [blame] | 15 | .size = 0x40000000UL, |
Marek Vasut | 23e239a | 2017-11-25 23:24:01 +0100 | [diff] [blame] | 16 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 17 | PTE_BLOCK_NON_SHARE | |
| 18 | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 19 | }, { |
Marek Vasut | a5abacc | 2018-02-15 13:19:33 +0100 | [diff] [blame] | 20 | .virt = 0x40000000UL, |
| 21 | .phys = 0x40000000UL, |
| 22 | .size = 0x80000000UL, |
Marek Vasut | 04cd2e2 | 2017-10-08 20:52:52 +0200 | [diff] [blame] | 23 | .attrs = PTE_BLOCK_MEMTYPE(MT_NORMAL) | |
| 24 | PTE_BLOCK_INNER_SHARE |
| 25 | }, { |
Marek Vasut | a5abacc | 2018-02-15 13:19:33 +0100 | [diff] [blame] | 26 | .virt = 0xc0000000UL, |
| 27 | .phys = 0xc0000000UL, |
| 28 | .size = 0x40000000UL, |
Marek Vasut | 04cd2e2 | 2017-10-08 20:52:52 +0200 | [diff] [blame] | 29 | .attrs = PTE_BLOCK_MEMTYPE(MT_DEVICE_NGNRNE) | |
| 30 | PTE_BLOCK_NON_SHARE | |
| 31 | PTE_BLOCK_PXN | PTE_BLOCK_UXN |
| 32 | }, { |
| 33 | /* List terminator */ |
| 34 | 0, |
| 35 | } |
| 36 | }; |
| 37 | |
Marek Vasut | a5abacc | 2018-02-15 13:19:33 +0100 | [diff] [blame] | 38 | struct mm_region *mem_map = gen3_mem_map; |