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Tom Rini10e47792018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0
Stephen Warren45b8ae62012-08-05 16:07:21 +00002/*
3 * (C) Copyright 2012 Stephen Warren
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
Stephen Warren45b8ae62012-08-05 16:07:21 +00007 */
8
9#include <common.h>
10#include <asm/io.h>
11#include <asm/arch/wdog.h>
Alexander Graf3fce5342016-11-02 10:36:18 +010012#include <efi_loader.h>
Stephen Warren45b8ae62012-08-05 16:07:21 +000013
14#define RESET_TIMEOUT 10
15
Alexander Graf3fce5342016-11-02 10:36:18 +010016/*
17 * The Raspberry Pi firmware uses the RSTS register to know which partiton
18 * to boot from. The partiton value is spread into bits 0, 2, 4, 6, 8, 10.
19 * Partiton 63 is a special partition used by the firmware to indicate halt.
20 */
21#define BCM2835_WDOG_RSTS_RASPBERRYPI_HALT 0x555
22
Paolo Pisati6213c552017-02-10 17:28:05 +010023/* max ticks timeout */
24#define BCM2835_WDOG_MAX_TIMEOUT 0x000fffff
25
26#ifdef CONFIG_BCM2835_WDT
27extern void hw_watchdog_disable(void);
28#else
29void hw_watchdog_disable(void) {}
30#endif
31
Alexander Graf3fce5342016-11-02 10:36:18 +010032__efi_runtime_data struct bcm2835_wdog_regs *wdog_regs =
33 (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
34
Paolo Pisati6213c552017-02-10 17:28:05 +010035void __efi_runtime reset_cpu(ulong ticks)
Stephen Warren45b8ae62012-08-05 16:07:21 +000036{
Paolo Pisati6213c552017-02-10 17:28:05 +010037 uint32_t rstc, timeout;
38
39 if (ticks == 0) {
40 hw_watchdog_disable();
41 timeout = RESET_TIMEOUT;
42 } else
43 timeout = ticks & BCM2835_WDOG_MAX_TIMEOUT;
Stephen Warren45b8ae62012-08-05 16:07:21 +000044
Alexander Graf3fce5342016-11-02 10:36:18 +010045 rstc = readl(&wdog_regs->rstc);
Stephen Warren45b8ae62012-08-05 16:07:21 +000046 rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
47 rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
48
Paolo Pisati6213c552017-02-10 17:28:05 +010049 writel(BCM2835_WDOG_PASSWORD | timeout, &wdog_regs->wdog);
Alexander Graf3fce5342016-11-02 10:36:18 +010050 writel(BCM2835_WDOG_PASSWORD | rstc, &wdog_regs->rstc);
51}
52
53#ifdef CONFIG_EFI_LOADER
54
55void __efi_runtime EFIAPI efi_reset_system(
56 enum efi_reset_type reset_type,
57 efi_status_t reset_status,
58 unsigned long data_size, void *reset_data)
59{
60 u32 val;
61
Alexander Grafb7eefe42018-06-10 21:51:02 +020062 if (reset_type == EFI_RESET_COLD ||
63 reset_type == EFI_RESET_WARM ||
64 reset_type == EFI_RESET_PLATFORM_SPECIFIC) {
Alexander Graf3fce5342016-11-02 10:36:18 +010065 reset_cpu(0);
Alexander Grafb7eefe42018-06-10 21:51:02 +020066 } else if (reset_type == EFI_RESET_SHUTDOWN) {
Alexander Graf3fce5342016-11-02 10:36:18 +010067 /*
68 * We set the watchdog hard reset bit here to distinguish this reset
69 * from the normal (full) reset. bootcode.bin will not reboot after a
70 * hard reset.
71 */
72 val = readl(&wdog_regs->rsts);
73 val |= BCM2835_WDOG_PASSWORD;
74 val |= BCM2835_WDOG_RSTS_RASPBERRYPI_HALT;
75 writel(val, &wdog_regs->rsts);
76 reset_cpu(0);
Alexander Graf3fce5342016-11-02 10:36:18 +010077 }
78
79 while (1) { }
80}
81
Heinrich Schuchardt099b3b72018-03-03 15:28:59 +010082efi_status_t efi_reset_system_init(void)
Alexander Graf3fce5342016-11-02 10:36:18 +010083{
Heinrich Schuchardt099b3b72018-03-03 15:28:59 +010084 return efi_add_runtime_mmio(&wdog_regs, sizeof(*wdog_regs));
Stephen Warren45b8ae62012-08-05 16:07:21 +000085}
Alexander Graf3fce5342016-11-02 10:36:18 +010086
87#endif