Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 1 | /* |
| 2 | * SPI flash operations |
| 3 | * |
| 4 | * Copyright (C) 2008 Atmel Corporation |
| 5 | * Copyright (C) 2010 Reinhard Meyer, EMK Elektronik |
| 6 | * Copyright (C) 2013 Jagannadha Sutradharudu Teki, Xilinx Inc. |
| 7 | * |
Jagannadha Sutradharudu Teki | d145270 | 2013-10-10 22:32:55 +0530 | [diff] [blame] | 8 | * SPDX-License-Identifier: GPL-2.0+ |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 9 | */ |
| 10 | |
| 11 | #include <common.h> |
| 12 | #include <spi.h> |
| 13 | #include <spi_flash.h> |
| 14 | #include <watchdog.h> |
| 15 | |
Jagannadha Sutradharudu Teki | ac8242d | 2013-09-26 16:00:15 +0530 | [diff] [blame] | 16 | #include "sf_internal.h" |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 17 | |
| 18 | static void spi_flash_addr(u32 addr, u8 *cmd) |
| 19 | { |
| 20 | /* cmd[0] is actual command */ |
| 21 | cmd[1] = addr >> 16; |
| 22 | cmd[2] = addr >> 8; |
| 23 | cmd[3] = addr >> 0; |
| 24 | } |
| 25 | |
| 26 | int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr) |
| 27 | { |
| 28 | u8 cmd; |
| 29 | int ret; |
| 30 | |
| 31 | cmd = CMD_WRITE_STATUS; |
| 32 | ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1); |
| 33 | if (ret < 0) { |
| 34 | debug("SF: fail to write status register\n"); |
| 35 | return ret; |
| 36 | } |
| 37 | |
| 38 | return 0; |
| 39 | } |
| 40 | |
| 41 | #ifdef CONFIG_SPI_FLASH_BAR |
Jagannadha Sutradharudu Teki | 86a380e | 2013-08-28 14:57:03 +0530 | [diff] [blame] | 42 | static int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel) |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 43 | { |
| 44 | u8 cmd; |
| 45 | int ret; |
| 46 | |
| 47 | if (flash->bank_curr == bank_sel) { |
| 48 | debug("SF: not require to enable bank%d\n", bank_sel); |
| 49 | return 0; |
| 50 | } |
| 51 | |
| 52 | cmd = flash->bank_write_cmd; |
| 53 | ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1); |
| 54 | if (ret < 0) { |
| 55 | debug("SF: fail to write bank register\n"); |
| 56 | return ret; |
| 57 | } |
| 58 | flash->bank_curr = bank_sel; |
| 59 | |
| 60 | return 0; |
| 61 | } |
Jagannadha Sutradharudu Teki | e14596c | 2013-10-08 23:26:47 +0530 | [diff] [blame] | 62 | |
| 63 | static int spi_flash_bank(struct spi_flash *flash, u32 offset) |
| 64 | { |
| 65 | u8 bank_sel; |
| 66 | int ret; |
| 67 | |
| 68 | bank_sel = offset / SPI_FLASH_16MB_BOUN; |
| 69 | |
| 70 | ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); |
| 71 | if (ret) { |
| 72 | debug("SF: fail to set bank%d\n", bank_sel); |
| 73 | return ret; |
| 74 | } |
| 75 | |
| 76 | return 0; |
| 77 | } |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 78 | #endif |
| 79 | |
| 80 | int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout) |
| 81 | { |
| 82 | struct spi_slave *spi = flash->spi; |
| 83 | unsigned long timebase; |
| 84 | int ret; |
| 85 | u8 status; |
| 86 | u8 check_status = 0x0; |
| 87 | u8 poll_bit = STATUS_WIP; |
| 88 | u8 cmd = flash->poll_cmd; |
| 89 | |
| 90 | if (cmd == CMD_FLAG_STATUS) { |
| 91 | poll_bit = STATUS_PEC; |
| 92 | check_status = poll_bit; |
| 93 | } |
| 94 | |
| 95 | ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN); |
| 96 | if (ret) { |
| 97 | debug("SF: fail to read %s status register\n", |
| 98 | cmd == CMD_READ_STATUS ? "read" : "flag"); |
| 99 | return ret; |
| 100 | } |
| 101 | |
| 102 | timebase = get_timer(0); |
| 103 | do { |
| 104 | WATCHDOG_RESET(); |
| 105 | |
| 106 | ret = spi_xfer(spi, 8, NULL, &status, 0); |
| 107 | if (ret) |
| 108 | return -1; |
| 109 | |
| 110 | if ((status & poll_bit) == check_status) |
| 111 | break; |
| 112 | |
| 113 | } while (get_timer(timebase) < timeout); |
| 114 | |
| 115 | spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END); |
| 116 | |
| 117 | if ((status & poll_bit) == check_status) |
| 118 | return 0; |
| 119 | |
| 120 | /* Timed out */ |
| 121 | debug("SF: time out!\n"); |
| 122 | return -1; |
| 123 | } |
| 124 | |
| 125 | int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd, |
| 126 | size_t cmd_len, const void *buf, size_t buf_len) |
| 127 | { |
| 128 | struct spi_slave *spi = flash->spi; |
| 129 | unsigned long timeout = SPI_FLASH_PROG_TIMEOUT; |
| 130 | int ret; |
| 131 | |
| 132 | if (buf == NULL) |
| 133 | timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT; |
| 134 | |
| 135 | ret = spi_claim_bus(flash->spi); |
| 136 | if (ret) { |
| 137 | debug("SF: unable to claim SPI bus\n"); |
| 138 | return ret; |
| 139 | } |
| 140 | |
| 141 | ret = spi_flash_cmd_write_enable(flash); |
| 142 | if (ret < 0) { |
| 143 | debug("SF: enabling write failed\n"); |
| 144 | return ret; |
| 145 | } |
| 146 | |
| 147 | ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len); |
| 148 | if (ret < 0) { |
| 149 | debug("SF: write cmd failed\n"); |
| 150 | return ret; |
| 151 | } |
| 152 | |
| 153 | ret = spi_flash_cmd_wait_ready(flash, timeout); |
| 154 | if (ret < 0) { |
| 155 | debug("SF: write %s timed out\n", |
| 156 | timeout == SPI_FLASH_PROG_TIMEOUT ? |
| 157 | "program" : "page erase"); |
| 158 | return ret; |
| 159 | } |
| 160 | |
| 161 | spi_release_bus(spi); |
| 162 | |
| 163 | return ret; |
| 164 | } |
| 165 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 166 | int spi_flash_cmd_erase_ops(struct spi_flash *flash, u32 offset, size_t len) |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 167 | { |
| 168 | u32 erase_size; |
| 169 | u8 cmd[4]; |
| 170 | int ret = -1; |
| 171 | |
Jagannadha Sutradharudu Teki | bc0f879 | 2013-10-02 19:36:58 +0530 | [diff] [blame] | 172 | erase_size = flash->erase_size; |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 173 | if (offset % erase_size || len % erase_size) { |
| 174 | debug("SF: Erase offset/length not multiple of erase size\n"); |
| 175 | return -1; |
| 176 | } |
| 177 | |
Jagannadha Sutradharudu Teki | bc0f879 | 2013-10-02 19:36:58 +0530 | [diff] [blame] | 178 | cmd[0] = flash->erase_cmd; |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 179 | while (len) { |
| 180 | #ifdef CONFIG_SPI_FLASH_BAR |
Jagannadha Sutradharudu Teki | e14596c | 2013-10-08 23:26:47 +0530 | [diff] [blame] | 181 | ret = spi_flash_bank(flash, offset); |
| 182 | if (ret < 0) |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 183 | return ret; |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 184 | #endif |
| 185 | spi_flash_addr(offset, cmd); |
| 186 | |
| 187 | debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1], |
| 188 | cmd[2], cmd[3], offset); |
| 189 | |
| 190 | ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0); |
| 191 | if (ret < 0) { |
| 192 | debug("SF: erase failed\n"); |
| 193 | break; |
| 194 | } |
| 195 | |
| 196 | offset += erase_size; |
| 197 | len -= erase_size; |
| 198 | } |
| 199 | |
| 200 | return ret; |
| 201 | } |
| 202 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 203 | int spi_flash_cmd_write_ops(struct spi_flash *flash, u32 offset, |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 204 | size_t len, const void *buf) |
| 205 | { |
| 206 | unsigned long byte_addr, page_size; |
| 207 | size_t chunk_len, actual; |
| 208 | u8 cmd[4]; |
| 209 | int ret = -1; |
| 210 | |
| 211 | page_size = flash->page_size; |
| 212 | |
| 213 | cmd[0] = CMD_PAGE_PROGRAM; |
| 214 | for (actual = 0; actual < len; actual += chunk_len) { |
| 215 | #ifdef CONFIG_SPI_FLASH_BAR |
Jagannadha Sutradharudu Teki | e14596c | 2013-10-08 23:26:47 +0530 | [diff] [blame] | 216 | ret = spi_flash_bank(flash, offset); |
| 217 | if (ret < 0) |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 218 | return ret; |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 219 | #endif |
| 220 | byte_addr = offset % page_size; |
| 221 | chunk_len = min(len - actual, page_size - byte_addr); |
| 222 | |
| 223 | if (flash->spi->max_write_size) |
| 224 | chunk_len = min(chunk_len, flash->spi->max_write_size); |
| 225 | |
| 226 | spi_flash_addr(offset, cmd); |
| 227 | |
| 228 | debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n", |
| 229 | buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len); |
| 230 | |
| 231 | ret = spi_flash_write_common(flash, cmd, sizeof(cmd), |
| 232 | buf + actual, chunk_len); |
| 233 | if (ret < 0) { |
| 234 | debug("SF: write failed\n"); |
| 235 | break; |
| 236 | } |
| 237 | |
| 238 | offset += chunk_len; |
| 239 | } |
| 240 | |
| 241 | return ret; |
| 242 | } |
| 243 | |
| 244 | int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd, |
| 245 | size_t cmd_len, void *data, size_t data_len) |
| 246 | { |
| 247 | struct spi_slave *spi = flash->spi; |
| 248 | int ret; |
| 249 | |
| 250 | ret = spi_claim_bus(flash->spi); |
| 251 | if (ret) { |
| 252 | debug("SF: unable to claim SPI bus\n"); |
| 253 | return ret; |
| 254 | } |
| 255 | |
| 256 | ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len); |
| 257 | if (ret < 0) { |
| 258 | debug("SF: read cmd failed\n"); |
| 259 | return ret; |
| 260 | } |
| 261 | |
| 262 | spi_release_bus(spi); |
| 263 | |
| 264 | return ret; |
| 265 | } |
| 266 | |
Jagannadha Sutradharudu Teki | 25dc86a | 2013-10-02 19:38:49 +0530 | [diff] [blame] | 267 | int spi_flash_cmd_read_ops(struct spi_flash *flash, u32 offset, |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 268 | size_t len, void *data) |
| 269 | { |
| 270 | u8 cmd[5], bank_sel = 0; |
| 271 | u32 remain_len, read_len; |
| 272 | int ret = -1; |
| 273 | |
| 274 | /* Handle memory-mapped SPI */ |
| 275 | if (flash->memory_map) { |
Poddar, Sourav | 47e21e0 | 2013-11-14 21:01:15 +0530 | [diff] [blame^] | 276 | ret = spi_claim_bus(flash->spi); |
| 277 | if (ret) { |
| 278 | debug("SF: unable to claim SPI bus\n"); |
| 279 | return ret; |
| 280 | } |
Poddar, Sourav | dbbe68d | 2013-10-07 15:53:01 +0530 | [diff] [blame] | 281 | spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP); |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 282 | memcpy(data, flash->memory_map + offset, len); |
Poddar, Sourav | dbbe68d | 2013-10-07 15:53:01 +0530 | [diff] [blame] | 283 | spi_xfer(flash->spi, 0, NULL, NULL, SPI_XFER_MMAP_END); |
Poddar, Sourav | 47e21e0 | 2013-11-14 21:01:15 +0530 | [diff] [blame^] | 284 | spi_release_bus(flash->spi); |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 285 | return 0; |
| 286 | } |
| 287 | |
| 288 | cmd[0] = CMD_READ_ARRAY_FAST; |
| 289 | cmd[4] = 0x00; |
| 290 | |
| 291 | while (len) { |
| 292 | #ifdef CONFIG_SPI_FLASH_BAR |
| 293 | bank_sel = offset / SPI_FLASH_16MB_BOUN; |
| 294 | |
| 295 | ret = spi_flash_cmd_bankaddr_write(flash, bank_sel); |
| 296 | if (ret) { |
| 297 | debug("SF: fail to set bank%d\n", bank_sel); |
| 298 | return ret; |
| 299 | } |
| 300 | #endif |
Jagannadha Sutradharudu Teki | 84fb863 | 2013-10-10 22:14:09 +0530 | [diff] [blame] | 301 | remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1)) - offset; |
Jagannadha Sutradharudu Teki | e9a8b82 | 2013-08-29 19:01:56 +0530 | [diff] [blame] | 302 | if (len < remain_len) |
| 303 | read_len = len; |
| 304 | else |
| 305 | read_len = remain_len; |
| 306 | |
| 307 | spi_flash_addr(offset, cmd); |
| 308 | |
| 309 | ret = spi_flash_read_common(flash, cmd, sizeof(cmd), |
| 310 | data, read_len); |
| 311 | if (ret < 0) { |
| 312 | debug("SF: read failed\n"); |
| 313 | break; |
| 314 | } |
| 315 | |
| 316 | offset += read_len; |
| 317 | len -= read_len; |
| 318 | data += read_len; |
| 319 | } |
| 320 | |
| 321 | return ret; |
| 322 | } |
Jagannadha Sutradharudu Teki | 0803242 | 2013-10-02 19:34:53 +0530 | [diff] [blame] | 323 | |
| 324 | #ifdef CONFIG_SPI_FLASH_SST |
| 325 | static int sst_byte_write(struct spi_flash *flash, u32 offset, const void *buf) |
| 326 | { |
| 327 | int ret; |
| 328 | u8 cmd[4] = { |
| 329 | CMD_SST_BP, |
| 330 | offset >> 16, |
| 331 | offset >> 8, |
| 332 | offset, |
| 333 | }; |
| 334 | |
| 335 | debug("BP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", |
| 336 | spi_w8r8(flash->spi, CMD_READ_STATUS), buf, cmd[0], offset); |
| 337 | |
| 338 | ret = spi_flash_cmd_write_enable(flash); |
| 339 | if (ret) |
| 340 | return ret; |
| 341 | |
| 342 | ret = spi_flash_cmd_write(flash->spi, cmd, sizeof(cmd), buf, 1); |
| 343 | if (ret) |
| 344 | return ret; |
| 345 | |
| 346 | return spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); |
| 347 | } |
| 348 | |
| 349 | int sst_write_wp(struct spi_flash *flash, u32 offset, size_t len, |
| 350 | const void *buf) |
| 351 | { |
| 352 | size_t actual, cmd_len; |
| 353 | int ret; |
| 354 | u8 cmd[4]; |
| 355 | |
| 356 | ret = spi_claim_bus(flash->spi); |
| 357 | if (ret) { |
| 358 | debug("SF: Unable to claim SPI bus\n"); |
| 359 | return ret; |
| 360 | } |
| 361 | |
| 362 | /* If the data is not word aligned, write out leading single byte */ |
| 363 | actual = offset % 2; |
| 364 | if (actual) { |
| 365 | ret = sst_byte_write(flash, offset, buf); |
| 366 | if (ret) |
| 367 | goto done; |
| 368 | } |
| 369 | offset += actual; |
| 370 | |
| 371 | ret = spi_flash_cmd_write_enable(flash); |
| 372 | if (ret) |
| 373 | goto done; |
| 374 | |
| 375 | cmd_len = 4; |
| 376 | cmd[0] = CMD_SST_AAI_WP; |
| 377 | cmd[1] = offset >> 16; |
| 378 | cmd[2] = offset >> 8; |
| 379 | cmd[3] = offset; |
| 380 | |
| 381 | for (; actual < len - 1; actual += 2) { |
| 382 | debug("WP[%02x]: 0x%p => cmd = { 0x%02x 0x%06x }\n", |
| 383 | spi_w8r8(flash->spi, CMD_READ_STATUS), buf + actual, |
| 384 | cmd[0], offset); |
| 385 | |
| 386 | ret = spi_flash_cmd_write(flash->spi, cmd, cmd_len, |
| 387 | buf + actual, 2); |
| 388 | if (ret) { |
| 389 | debug("SF: sst word program failed\n"); |
| 390 | break; |
| 391 | } |
| 392 | |
| 393 | ret = spi_flash_cmd_wait_ready(flash, SPI_FLASH_PROG_TIMEOUT); |
| 394 | if (ret) |
| 395 | break; |
| 396 | |
| 397 | cmd_len = 1; |
| 398 | offset += 2; |
| 399 | } |
| 400 | |
| 401 | if (!ret) |
| 402 | ret = spi_flash_cmd_write_disable(flash); |
| 403 | |
| 404 | /* If there is a single trailing byte, write it out */ |
| 405 | if (!ret && actual != len) |
| 406 | ret = sst_byte_write(flash, offset, buf + actual); |
| 407 | |
| 408 | done: |
| 409 | debug("SF: sst: program %s %zu bytes @ 0x%zx\n", |
| 410 | ret ? "failure" : "success", len, offset - actual); |
| 411 | |
| 412 | spi_release_bus(flash->spi); |
| 413 | return ret; |
| 414 | } |
| 415 | #endif |