Ariel D'Alessandro | 93add53 | 2022-04-12 10:31:38 -0300 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | /* |
| 3 | * Copyright 2021 Collabora Ltd. |
| 4 | * |
| 5 | */ |
| 6 | |
| 7 | #include <hang.h> |
| 8 | #include <init.h> |
| 9 | #include <spl.h> |
| 10 | #include <asm/arch/clock.h> |
| 11 | #include <asm/arch/ddr.h> |
| 12 | #include <asm/arch/imx8mn_pins.h> |
| 13 | #include <asm/arch/sys_proto.h> |
| 14 | #include <asm/mach-imx/boot_mode.h> |
| 15 | #include <asm/mach-imx/gpio.h> |
| 16 | #include <dm/device.h> |
| 17 | #include <dm/uclass.h> |
| 18 | |
| 19 | int spl_board_boot_device(enum boot_device boot_dev_spl) |
| 20 | { |
| 21 | return BOOT_DEVICE_BOOTROM; |
| 22 | } |
| 23 | |
| 24 | void spl_dram_init(void) |
| 25 | { |
| 26 | ddr_init(&dram_timing); |
| 27 | } |
| 28 | |
| 29 | void spl_board_init(void) |
| 30 | { |
| 31 | struct udevice *dev; |
| 32 | int ret; |
| 33 | |
| 34 | debug("Normal Boot\n"); |
| 35 | |
| 36 | ret = uclass_get_device_by_name(UCLASS_CLK, |
| 37 | "clock-controller@30380000", |
| 38 | &dev); |
| 39 | if (ret < 0) |
| 40 | puts("Failed to find clock node. Check device tree\n"); |
| 41 | } |
| 42 | |
Ariel D'Alessandro | 93add53 | 2022-04-12 10:31:38 -0300 | [diff] [blame] | 43 | #define WDOG_PAD_CTRL (PAD_CTL_DSE6 | PAD_CTL_ODE | PAD_CTL_PUE | PAD_CTL_PE) |
| 44 | |
Ariel D'Alessandro | 93add53 | 2022-04-12 10:31:38 -0300 | [diff] [blame] | 45 | static const iomux_v3_cfg_t wdog_pads[] = { |
| 46 | IMX8MN_PAD_GPIO1_IO02__WDOG1_WDOG_B | MUX_PAD_CTRL(WDOG_PAD_CTRL), |
| 47 | }; |
| 48 | |
| 49 | int board_early_init_f(void) |
| 50 | { |
| 51 | struct wdog_regs *wdog = (struct wdog_regs *)WDOG1_BASE_ADDR; |
| 52 | |
| 53 | imx_iomux_v3_setup_multiple_pads(wdog_pads, ARRAY_SIZE(wdog_pads)); |
| 54 | set_wdog_reset(wdog); |
| 55 | |
Ariel D'Alessandro | 93add53 | 2022-04-12 10:31:38 -0300 | [diff] [blame] | 56 | init_uart_clk(3); |
| 57 | |
| 58 | if (IS_ENABLED(CONFIG_NAND_MXS)) { |
| 59 | init_nand_clk(); |
| 60 | } |
| 61 | |
| 62 | return 0; |
| 63 | } |
| 64 | |
| 65 | void board_init_f(ulong dummy) |
| 66 | { |
| 67 | int ret; |
| 68 | |
| 69 | /* Clear the BSS. */ |
| 70 | memset(__bss_start, 0, __bss_end - __bss_start); |
| 71 | |
| 72 | arch_cpu_init(); |
| 73 | |
| 74 | board_early_init_f(); |
| 75 | |
| 76 | timer_init(); |
| 77 | |
Ariel D'Alessandro | 93add53 | 2022-04-12 10:31:38 -0300 | [diff] [blame] | 78 | ret = spl_init(); |
| 79 | if (ret) { |
| 80 | debug("spl_init() failed: %d\n", ret); |
| 81 | hang(); |
| 82 | } |
| 83 | |
Michael Trimarchi | 47cbd8e | 2022-04-18 08:53:36 +0200 | [diff] [blame^] | 84 | preloader_console_init(); |
| 85 | |
Ariel D'Alessandro | 93add53 | 2022-04-12 10:31:38 -0300 | [diff] [blame] | 86 | /* DDR initialization */ |
| 87 | spl_dram_init(); |
| 88 | |
| 89 | board_init_r(NULL, 0); |
| 90 | } |